Searched refs:fPageShw (Results 1 - 3 of 3) sorted by relevance
| /vbox/src/VBox/VMM/VMMAll/ |
| H A D | PGMAll.cpp | 668 uint64_t fPageShw;
669 rc = PGMShwGetPage(pVCpu, (RTGCPTR)Addr, &fPageShw, NULL);
671 || (fWrite && !(fPageShw & X86_PTE_RW))
672 || (fUser && !(fPageShw & X86_PTE_US)) )
675 Addr, rc, fWrite && !(fPageShw & X86_PTE_RW), fUser && !(fPageShw & X86_PTE_US)));
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| H A D | PGMAllBth.h | 1070 uint64_t fPageShw; local
1071 rc = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL);
1072 AssertMsg((RT_SUCCESS(rc) && (fPageShw & X86_PTE_RW)) || pVM->cCpus > 1 /* new monitor can be installed/page table flushed between the trap exit and PGMTrap0eHandler */,
1073 ("rc=%Rrc fPageShw=%RX64\n", rc, fPageShw));
1119 uint64_t fPageShw; local
1120 rc = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL);
1126 AssertMsg( (fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK))
1129 && (fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK | X86_PTE_RW | X86_PTE_US))
1131 && (fPageShw
[all...] |
| /vbox/src/VBox/VMM/VMMR3/ |
| H A D | CSAM.cpp | 2016 uint64_t fPageShw;
2018 rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
2020 // || !(fPageShw & X86_PTE_RW)
2021 // || (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%RX64)!!\n", pPageAddrGC, GCPhys, fPageShw));
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