Searched refs:disallowed0 (Results 1 - 3 of 3) sorted by relevance
| /vbox/src/VBox/VMM/VMMR3/ |
| H A D | HM.cpp | 280 #define HMVMX_REPORT_FEATURE(allowed1, disallowed0, featflag) \
286 if ((disallowed0) & (featflag)) \
1044 zap = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0;
1052 zap = pVM->hm.s.vmx.Msrs.VmxProcCtls.n.disallowed0;
1078 zap = pVM->hm.s.vmx.Msrs.VmxProcCtls2.n.disallowed0;
1099 zap = pVM->hm.s.vmx.Msrs.VmxEntry.n.disallowed0;
1110 zap = pVM->hm.s.vmx.Msrs.VmxExit.n.disallowed0;
3002 LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry disallowed %#RX32\n", pVM->hm.s.vmx.Msrs.VmxEntry.n.disallowed0));
|
| /vbox/include/VBox/vmm/ |
| H A D | hm_vmx.h | 826 uint32_t disallowed0; member in struct:__anon355::__anon356
|
| /vbox/src/VBox/VMM/VMMR0/ |
| H A D | HMVMXR0.cpp | 2335 uint32_t val = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0; /* Bits set here must always be set. */
2354 pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0, val, zap));
2380 uint32_t val = pVM->hm.s.vmx.Msrs.VmxProcCtls.n.disallowed0; /* Bits set here must be set in the VMCS. */
2393 || (pVM->hm.s.vmx.Msrs.VmxProcCtls.n.disallowed0 & VMX_VMCS_CTRL_PROC_EXEC_MOV_DR_EXIT))
2477 pVM->hm.s.vmx.Msrs.VmxProcCtls.n.disallowed0, val, zap));
2492 val = pVM->hm.s.vmx.Msrs.VmxProcCtls2.n.disallowed0; /* Bits set here must be set in the VMCS. */
2535 "cpu=%#RX64 val=%#RX64 zap=%#RX64\n", pVM->hm.s.vmx.Msrs.VmxProcCtls2.n.disallowed0, val, zap));
3297 uint32_t val = pVM->hm.s.vmx.Msrs.VmxEntry.n.disallowed0; /* Bits set here must be set in the VMCS. */
3332 pVM->hm.s.vmx.Msrs.VmxEntry.n.disallowed0, val, zap));
3367 uint32_t val = pVM->hm.s.vmx.Msrs.VmxExit.n.disallowed0; /* Bit
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