Searched refs:X86_DR7_GD (Results 1 - 7 of 7) sorted by relevance

/vbox/src/VBox/VMM/VMMAll/
H A DDBGFAll.cpp38 RTGCUINTREG uDr7 = X86_DR7_GD | X86_DR7_GE | X86_DR7_LE | X86_DR7_RA1_MASK;
244 pCtx->dr[7] &= ~X86_DR7_GD;
H A DIEMAllCImpl.cpp.h5163 if (pCtx->dr[7] & X86_DR7_GD)
5234 if (pCtx->dr[7] & X86_DR7_GD)
H A DIEMAll.cpp2154 pCtx->dr[7] &= ~X86_DR7_GD;
3989 pIemCpu->CTX_SUFF(pCtx)->dr[7] &= ~X86_DR7_GD;
/vbox/src/VBox/VMM/VMMRC/
H A DTRPMRCHandlers.cpp311 * We currently don't make use of the X86_DR7_GD bit, but
328 if (CPUMGetGuestDR7(pVCpu) & X86_DR7_GD)
329 CPUMSetGuestDR7(pVCpu, CPUMGetGuestDR7(pVCpu) & ~X86_DR7_GD);
365 * We currently don't make use of the X86_DR7_GD bit, but
/vbox/include/iprt/
H A Dx86.h840 /** Bit 13 - BD - Debug register access detected. Corresponds to the X86_DR7_GD bit. */
896 #define X86_DR7_GD RT_BIT(13) macro
/vbox/src/VBox/VMM/VMMR0/
H A DHMSVMR0.cpp1518 if (pCtx->dr[7] & (X86_DR7_ENABLED_MASK | X86_DR7_GD)) /** @todo Why GD? */
H A DHMVMXR0.cpp4217 if (pMixedCtx->dr[7] & (X86_DR7_ENABLED_MASK | X86_DR7_GD)) /** @todo Why GD? */
11835 /* X86_DR7_GD will be cleared if DRx accesses should be trapped inside the guest. */
11836 pMixedCtx->dr[7] &= ~X86_DR7_GD;

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