Searched refs:VmxPinCtls (Results 1 - 4 of 4) sorted by relevance

/vbox/src/VBox/VMM/VMMR0/
H A DHMR0.cpp385 g_HvmR0.vmx.Msrs.VmxPinCtls.u = ASMRdMsr(MSR_IA32_VMX_PINBASED_CTLS);
502 if (g_HvmR0.vmx.Msrs.VmxPinCtls.n.allowed1 & VMX_VMCS_CTRL_PIN_EXEC_PREEMPT_TIMER)
H A DHMVMXR0.cpp2335 uint32_t val = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0; /* Bits set here must always be set. */
2336 uint32_t zap = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.allowed1; /* Bits cleared here must always be cleared. */
2341 if (pVM->hm.s.vmx.Msrs.VmxPinCtls.n.allowed1 & VMX_VMCS_CTRL_PIN_EXEC_VIRTUAL_NMI)
2347 Assert(pVM->hm.s.vmx.Msrs.VmxPinCtls.n.allowed1 & VMX_VMCS_CTRL_PIN_EXEC_PREEMPT_TIMER);
2354 pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0, val, zap));
/vbox/include/VBox/vmm/
H A Dhm_vmx.h842 VMXCAPABILITY VmxPinCtls; member in struct:VMXMSRS
/vbox/src/VBox/VMM/VMMR3/
H A DHM.cpp1042 LogRel(("HM: MSR_IA32_VMX_PINBASED_CTLS = %#RX64\n", pVM->hm.s.vmx.Msrs.VmxPinCtls.u));
1043 val = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.allowed1;
1044 zap = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0;

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