Searched refs:TX_RING_SIZE (Results 1 - 14 of 14) sorted by relevance

/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/
H A Dpcnet32.h38 #define TX_RING_SIZE ( 1 << ( PCNET32_LOG_TX_BUFFERS ) ) macro
45 #define TX_RING_BYTES ( TX_RING_SIZE * sizeof(struct pcnet32_tx_desc ) )
134 struct io_buffer *tx_iobuf[TX_RING_SIZE];
H A D3c90x.c252 malloc_dma(TX_RING_SIZE * sizeof(struct TXD), TX_RING_ALIGN);
259 memset(p->tx_ring, 0, TX_RING_SIZE * sizeof(struct TXD));
298 p->tx_tail = (p->tx_tail + 1) % TX_RING_SIZE;
307 free_dma(p->tx_ring, TX_RING_SIZE * sizeof(struct TXD));
332 if (inf_3c90x->tx_cnt == TX_RING_SIZE) {
341 (((inf_3c90x->tx_cur + TX_RING_SIZE) - 1) % TX_RING_SIZE);
379 inf_3c90x->tx_cur = (inf_3c90x->tx_cur + 1) % TX_RING_SIZE;
H A D3c90x.h264 #define TX_RING_SIZE 8 macro
303 struct io_buffer *tx_iobuf[TX_RING_SIZE];
H A Depic100.c19 #define TX_RING_SIZE 2 /* use at least 2 buffers for TX */ macro
92 struct epic_tx_desc tx_ring[TX_RING_SIZE]
95 unsigned char tx_packet[PKT_BUF_SZ * TX_RING_SIZE];
286 for (i = 0; i < TX_RING_SIZE; i++) {
314 entry = cur_tx % TX_RING_SIZE;
H A Dw89c840.c114 #define TX_RING_SIZE 2 macro
236 struct w840_tx_desc tx_ring[TX_RING_SIZE];
267 char tx_packet[PKT_BUF_SZ * TX_RING_SIZE];
506 entry = w840private.cur_tx % TX_RING_SIZE;
524 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
957 for (i = 0; i < TX_RING_SIZE; i++) {
H A Dvia-rhine.c421 #define TX_RING_SIZE 2 macro
550 char txbuf[TX_RING_SIZE * PKT_BUF_SZ + 32];
552 char txdesc[TX_RING_SIZE * sizeof (struct rhine_tx_desc) + 32];
589 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
665 char *tx_buffs[TX_RING_SIZE];
675 struct sk_buff *tx_skbuff[TX_RING_SIZE];
740 for (i = 0; i < TX_RING_SIZE; i++)
1244 for (i = 0; i < TX_RING_SIZE; i++)
1361 entry = tp->cur_tx % TX_RING_SIZE;
H A Dforcedeth.h57 #define TX_RING_SIZE 16 macro
58 #define RXTX_RING_SIZE ( ( RX_RING_SIZE ) + ( TX_RING_SIZE ) )
325 struct io_buffer *tx_iobuf[TX_RING_SIZE];
H A D3c515.c94 #define TX_RING_SIZE 16 macro
231 struct boom_tx_desc tx_ring[TX_RING_SIZE];
234 struct sk_buff *tx_skbuff[TX_RING_SIZE];
399 for (i = 0; i < TX_RING_SIZE; i++)
H A Dsky2.c65 #define TX_RING_SIZE 128 macro
66 #define TX_PENDING (TX_RING_SIZE - 1)
871 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
1117 free_dma(sky2->tx_le, TX_RING_SIZE * sizeof(struct sky2_tx_le));
1139 sky2->tx_le = malloc_dma(TX_RING_SIZE * sizeof(struct sky2_tx_le), TX_RING_ALIGN);
1143 memset(sky2->tx_le, 0, TX_RING_SIZE * sizeof(struct sky2_tx_le));
1145 sky2->tx_ring = zalloc(TX_RING_SIZE * sizeof(struct tx_ring_info));
1195 TX_RING_SIZE - 1);
1221 return (head - tail) & (TX_RING_SIZE - 1);
1285 assert(done < TX_RING_SIZE);
[all...]
H A Dpcnet32.c764 if ( priv->tx_fill_ctr == TX_RING_SIZE ) {
788 priv->tx_curr = ( priv->tx_curr + 1 ) % TX_RING_SIZE;
837 priv->tx_tail = ( priv->tx_tail + 1 ) % TX_RING_SIZE;
H A Dsundance.c100 #define TX_RING_SIZE 2 macro
237 static struct netdev_desc tx_ring[TX_RING_SIZE];
245 unsigned char txb[PKT_BUF_SZ * TX_RING_SIZE];
H A Dforcedeth.c188 for ( i = 0; i < TX_RING_SIZE; i++ ) {
293 ( ( TX_RING_SIZE - 1 ) << NVREG_RINGSZ_TXSHIFT ),
806 if ( priv->tx_fill_ctr == TX_RING_SIZE ) {
838 priv->tx_curr = ( priv->tx_curr + 1 ) % TX_RING_SIZE;
887 priv->tx_tail = ( priv->tx_tail + 1 ) % TX_RING_SIZE;
H A Dskge.h30 #define TX_RING_SIZE ( NUM_TX_DESC * sizeof ( struct skge_rx_desc ) ) macro
32 #define RING_SIZE ( TX_RING_SIZE + RX_RING_SIZE )
H A Dtulip.c428 #define TX_RING_SIZE 2
431 struct tulip_tx_desc tx_ring[TX_RING_SIZE];
427 #define TX_RING_SIZE macro

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