Searched refs:SHW_PDE_PG_MASK (Results 1 - 4 of 4) sorted by relevance
/vbox/src/VBox/VMM/VMMRC/ |
H A D | PGMRCShw.h | 29 #undef SHW_PDE_PG_MASK macro 45 # define SHW_PDE_PG_MASK X86_PDE_PG_MASK macro 60 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK macro
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/vbox/src/VBox/VMM/VMMR3/ |
H A D | PGMShw.h | 29 #undef SHW_PDE_PG_MASK macro 49 # define SHW_PDE_PG_MASK X86_PDE_PG_MASK macro 66 # define SHW_PDE_PG_MASK EPT_PDE_PG_MASK macro 86 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK macro
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/vbox/src/VBox/VMM/VMMAll/ |
H A D | PGMAllShw.h | 29 #undef SHW_PDE_PG_MASK macro 64 # define SHW_PDE_PG_MASK X86_PDE_PG_MASK macro 96 # define SHW_PDE_PG_MASK EPT_PDE_PG_MASK macro 131 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK macro 270 *pfFlags = (Pde.u & ~SHW_PDE_PG_MASK); 278 *pHCPhys = (Pde.u & SHW_PDE_PG_MASK) + (GCPtr & (RT_BIT(SHW_PD_SHIFT) - 1) & X86_PAGE_4K_BASE_MASK); 289 int rc2 = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pde.u & SHW_PDE_PG_MASK, &pPT); 430 rc = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pde.u & SHW_PDE_PG_MASK, &pPT);
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H A D | PGMAllBth.h | 1347 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, PdeDst.u & SHW_PDE_PG_MASK); 1385 pgmPoolFree(pVM, PdeDst.u & SHW_PDE_PG_MASK, pShwPde->idx, iPDDst); 1397 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, PdeDst.u & SHW_PDE_PG_MASK); 1428 pgmPoolFree(pVM, PdeDst.u & SHW_PDE_PG_MASK, pShwPde->idx, iPDDst); 1441 pgmPoolFree(pVM, PdeDst.u & SHW_PDE_PG_MASK, pShwPde->idx, iPDDst); 1960 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, PdeDst.u & SHW_PDE_PG_MASK); 2289 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, PdeDst.u & SHW_PDE_PG_MASK); 2473 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, pPdeDst->u & SHW_PDE_PG_MASK); 2521 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, pPdeDst->u & SHW_PDE_PG_MASK); 2593 AssertMsgFailed(("pgmPoolGetPageByHCPhys %RGp failed!\n", pPdeDst->u & SHW_PDE_PG_MASK)); [all...] |
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