Searched refs:phy_port (Results 1 - 6 of 6) sorted by relevance

/illumos-gate/usr/src/uts/common/io/1394/
H A Ds1394_bus_reset.c491 hal->topology_tree[i].phy_port[j] = NULL;
542 hal->topology_tree[i].phy_port[j] = tmp;
544 tmp->phy_port[tmp->parent_port] =
931 if (!NODE_VISITED(tmp->phy_port[i])) {
932 tmp->phy_port[i]->old_node =
933 tmp->old_node->phy_port[i];
935 tmp->phy_port[i]);
1000 current = current->phy_port[i];
1215 if ((tmp->phy_port[j] != NULL) &&
1216 (!NODE_VISITED(tmp->phy_port[
[all...]
/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/oce/
H A Doce_hw.h553 uint8_t phy_port; member in struct:oce_async_cqe_link_state::__anon7634::__anon7635
568 uint8_t phy_port;
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c2554 #define NXGE_SET_PHY_TUNABLES(nxgep, phy_port, stat) \
2560 if ((stat = nxge_mdio_write(nxgep, phy_port, \
7640 nxge_get_cl45_pma_pmd_id(p_nxge_t nxgep, int phy_port) argument
7648 (void) npi_mac_mif_mdio_read(handle, phy_port, NXGE_PMA_PMD_DEV_ADDR,
7650 (void) npi_mac_mif_mdio_read(handle, phy_port, NXGE_PMA_PMD_DEV_ADDR,
7660 "devid[0x%llx]", phy_port, pma_pmd_dev_id));
7666 nxge_get_cl45_pcs_id(p_nxge_t nxgep, int phy_port) argument
7674 (void) npi_mac_mif_mdio_read(handle, phy_port, NXGE_PCS_DEV_ADDR,
7676 (void) npi_mac_mif_mdio_read(handle, phy_port, NXGE_PCS_DEV_ADDR,
7685 "devid[0x%llx]", phy_port, pcs_dev_i
7691 nxge_get_cl22_phy_id(p_nxge_t nxgep, int phy_port) argument
[all...]
/illumos-gate/usr/src/uts/common/sys/1394/
H A Ds1394.h277 s1394_node_t *phy_port[IEEE1394_MAX_NUM_PORTS]; member in struct:s1394_node_s
/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/emlxs/
H A Demlxs_mbox.h4504 uint8_t phy_port; member in struct:__anon7429::__anon7430::__anon7583
/illumos-gate/usr/src/uts/common/io/scsi/adapters/mpt_sas/
H A Dmptsas.c852 uint8_t phy_port = 0; local
1019 &attached_sas_wwn, &dev_info, &phy_port, &phy_id,

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