Searched refs:hres_lock (Results 1 - 15 of 15) sorted by relevance
/illumos-gate/usr/src/uts/i86pc/sys/ |
H A D | clock.h | 82 * CLOCK_LOCK() sets the LSB (bit 0) of the hres_lock. The rest of the 97 lock_set_spl((lock_t *)&hres_lock + HRES_LOCK_OFFSET, \ 104 (lock_t *)&hres_lock + HRES_LOCK_OFFSET);
|
/illumos-gate/usr/src/uts/sun4u/sys/ |
H A D | machclock.h | 116 5: sethi %hi(hres_lock), scr; \ 117 lduw [scr + %lo(hres_lock)], hrlock; /* load clock lock */ \ 129 lduw [scr + %lo(hres_lock)], scr; /* load clock lock */ \ 141 5: sethi %hi(hres_lock), scr; \ 142 lduw [scr + %lo(hres_lock)], hrlock; /* load clock lock */ \ 151 ld [scr + %lo(hres_lock)], scr; /* load clock lock */ \
|
/illumos-gate/usr/src/uts/sun4/sys/ |
H A D | clock.h | 98 * The writer lock, hres_lock, is a 32-bit integer consisting of an 103 * (due to carry into bit 8). Thus each acquisition transforms hres_lock 106 * Readers can detect writer intervention by loading hres_lock before 131 * hres_lock completes before the load of any timestamp components. 136 * generates a dependency on the load of hres_lock. We have to do this 143 * value of hres_lock. This can be done either by generating load 148 * One unusual property of hres_lock is that it's acquired in a high 149 * level cyclic handler, hres_tick(). Thus, hres_lock must be acquired at 154 * If a cross-call happens while one CPU has hres_lock and another is 156 * deadlock: the first CPU will never release hres_lock sinc [all...] |
/illumos-gate/usr/src/uts/intel/asm/ |
H A D | clock.h | 47 : "m" (hres_lock)
|
/illumos-gate/usr/src/uts/sparc/sys/ |
H A D | machlock.h | 76 extern volatile int hres_lock;
|
/illumos-gate/usr/src/uts/sun4v/sys/ |
H A D | machclock.h | 229 5: sethi %hi(hres_lock), scr; \ 230 lduw [scr + %lo(hres_lock)], hrlock; /* load clock lock */ \ 243 lduw [scr + %lo(hres_lock)], scr; /* load clock lock */ \ 255 5: sethi %hi(hres_lock), scr; \ 256 lduw [scr + %lo(hres_lock)], hrlock; /* load clock lock */ \ 266 ld [scr + %lo(hres_lock)], scr; /* load clock lock */ \
|
/illumos-gate/usr/src/uts/i86pc/os/ |
H A D | timestamp.c | 189 old_hres_lock = hres_lock; 229 } while ((old_hres_lock & ~1) != hres_lock); 242 old_hres_lock = hres_lock; 271 } while ((old_hres_lock & ~1) != hres_lock); 290 * This is similar to the above, but it cannot actually spin on hres_lock. 302 old_hres_lock = hres_lock; 332 if ((old_hres_lock & ~1) == hres_lock) 344 if (old_hres_lock != hres_lock) 392 old_hres_lock = hres_lock; 396 } while ((old_hres_lock & ~1) != hres_lock); [all...] |
H A D | machdep.c | 707 * hrestime_adj updates under hres_lock in locore, so that the small 729 lock_prev = hres_lock; 774 if ((hres_lock & ~1) != lock_prev)
|
/illumos-gate/usr/src/uts/intel/sys/ |
H A D | machlock.h | 79 extern volatile int hres_lock;
|
/illumos-gate/usr/src/uts/sun4u/cpu/ |
H A D | common_asm.s | 595 sethi %hi(hres_lock), %o1 597 lduw [%o1 + %lo(hres_lock)], %o2 ! Load lock value 604 lduw [%o1 + %lo(hres_lock)], %o3 ! Reload lock value 675 ldstub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 ! try locking 679 ldub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 682 ldstub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 684 ldub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 754 ld [%l4 + %lo(hres_lock)], %i1 756 st %i1, [%l4 + %lo(hres_lock)] ! clear hres_lock 926 hres_lock: label [all...] |
/illumos-gate/usr/src/uts/sun4v/cpu/ |
H A D | common_asm.s | 441 sethi %hi(hres_lock), %o1 443 lduw [%o1 + %lo(hres_lock)], %o2 ! Load lock value 450 lduw [%o1 + %lo(hres_lock)], %o3 ! Reload lock value 521 ldstub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 ! try locking 525 ldub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 528 ldstub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 530 ldub [%l4 + %lo(hres_lock + HRES_LOCK_OFFSET)], %l5 600 ld [%l4 + %lo(hres_lock)], %i1 602 st %i1, [%l4 + %lo(hres_lock)] ! clear hres_lock 772 hres_lock: label [all...] |
/illumos-gate/usr/src/uts/sun4/cpu/ |
H A D | cpu_module.c | 38 volatile int hres_lock; variable
|
/illumos-gate/usr/src/uts/intel/amd64/ml/ |
H A D | amd64.il | 117 * Unlock hres_lock and increment the count value. (See clock.h) 121 incl hres_lock
|
/illumos-gate/usr/src/uts/intel/ia32/ml/ |
H A D | ia32.il | 118 * Unlock hres_lock and increment the count value. (See clock.h) 122 incl hres_lock
|
H A D | i86_subr.s | 3596 volatile int hres_lock; 3613 DGDEF3(hres_lock, 4, 8) 3641 leaq hres_lock(%rip), %rax 3672 * release the hres_lock 3674 incl hres_lock(%rip) 3697 movl $hres_lock, %eax 3874 incl hres_lock / release the hres_lock
|
Completed in 949 milliseconds