Searched refs:RX_DMA_CTL_STAT_REG (Results 1 - 3 of 3) sorted by relevance

/illumos-gate/usr/src/uts/common/io/nxge/npi/
H A Dnpi_rxdma.c49 RCRSTAT_C_REG, RX_DMA_ENT_MSK_REG, RX_DMA_CTL_STAT_REG, RCR_FLSH_REG,
1788 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel,
1791 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
1820 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel,
1823 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
1849 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel,
1861 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
1864 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel,
2072 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel,
2075 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
[all...]
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_rxdma.c1824 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel,
1828 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
1857 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, channel, &cs.value);
1884 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
2150 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
2819 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG,
2831 RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
2897 RXDMA_REG_READ64(handle, RX_DMA_CTL_STAT_REG, rcr_p->rdc, &cs.value);
/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_rxdma_hw.h783 #define RX_DMA_CTL_STAT_REG (DMC + 0x00070) macro

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