Searched refs:MISC_REGISTERS_RESET_REG_3_SET (Results 1 - 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dmisc_bits.h67 #define MISC_REGISTERS_RESET_REG_3_SET 0x5a4 // MISC_REGISTERS_RESET_REG_3+4 macro
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c3632 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val);
3671 REG_WR(cb, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val);

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