Searched refs:AMD_IOMMU_REG_GET64 (Results 1 - 5 of 5) sorted by relevance

/illumos-gate/usr/src/uts/i86pc/io/amd_iommu/
H A Damd_iommu_cmd.c37 while (AMD_IOMMU_REG_GET64(REGADDR64(
116 addr_lo = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
118 addr_hi = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
147 addr_lo = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
150 addr_hi = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
266 cmdhead_off = AMD_IOMMU_REG_GET64(
H A Damd_iommu_page_tables.c335 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 0 &&
336 AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 0) {
340 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 1 &&
341 AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 1) {
344 AMD_IOMMU_REG_GET64(&(devtbl_entry[0]),
347 ASSERT(dp->d_domainid == AMD_IOMMU_REG_GET64(&(devtbl_entry[1]),
449 V = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V);
450 TV = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV);
590 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 0) {
595 ASSERT(dp->d_pgtable_root_4K == AMD_IOMMU_REG_GET64(
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H A Damd_iommu_impl.c546 ASSERT(AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
548 ASSERT(AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
624 if (AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
638 if (AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
H A Damd_iommu_impl.h291 #define AMD_IOMMU_REG_GET64(rp, b) \ macro
H A Damd_iommu_log.c522 evtail_off = AMD_IOMMU_REG_GET64(

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