/vbox/src/VBox/Runtime/r0drv/darwin/ |
H A D | semmutex-r0drv-darwin.cpp | 38 # include <iprt/asm-amd64-x86.h>
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/vbox/src/VBox/Runtime/r0drv/linux/ |
H A D | threadctxhooks-r0drv-linux.c | 40 # include <iprt/asm-amd64-x86.h> 76 * task switch, so we have to do that ourselves. (x86 code is not affected.) */
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/vbox/src/VBox/Runtime/r0drv/ |
H A D | mpnotification-r0drv.c | 36 # include <iprt/asm-amd64-x86.h>
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H A D | powernotification-r0drv.c | 36 # include <iprt/asm-amd64-x86.h>
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/vbox/src/VBox/Runtime/r0drv/solaris/ |
H A D | semevent-r0drv-solaris.c | 39 # include <iprt/asm-amd64-x86.h>
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H A D | semeventmulti-r0drv-solaris.c | 39 # include <iprt/asm-amd64-x86.h>
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H A D | semmutex-r0drv-solaris.c | 39 # include <iprt/asm-amd64-x86.h>
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/vbox/src/VBox/Runtime/r3/os2/ |
H A D | thread-os2.cpp | 47 #include <iprt/asm-amd64-x86.h>
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/vbox/src/VBox/Runtime/r3/win/ |
H A D | thread-win.cpp | 40 #include <iprt/asm-amd64-x86.h> 165 void *apvReserved0[2]; /**< x86=0x00 W7/64=0x00 */ 166 DWORD adwReserved0[3]; /**< x86=0x08 W7/64=0x10 */ 167 void *apvReserved1[1]; /**< x86=0x14 W7/64=0x20 */ 168 DWORD cComInits; /**< x86=0x18 W7/64=0x28 */ 169 DWORD cOleInits; /**< x86=0x1c W7/64=0x2c */ 170 DWORD dwReserved1; /**< x86=0x20 W7/64=0x30 */ 171 void *apvReserved2[4]; /**< x86=0x24 W7/64=0x38 */ 172 DWORD adwReserved2[1]; /**< x86=0x34 W7/64=0x58 */ 173 void *pvCurrentCtx; /**< x86 [all...] |
/vbox/src/VBox/VMM/VMMRC/ |
H A D | VMMRC.cpp | 23 #include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
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H A D | MMRamRCA.asm | 24 %include "iprt/x86.mac"
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/vbox/src/VBox/VMM/testcase/ |
H A D | tstMicroRC.cpp | 27 #include <iprt/asm-amd64-x86.h>
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H A D | tstX86-1.cpp | 27 #include <iprt/x86.h>
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/vbox/src/VBox/ValidationKit/testboxscript/ |
H A D | setup.sh | 105 x86|i86pc|ia32|i[3456789]86|BePC) 106 RETVAL='x86'
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/vbox/src/VBox/VMM/VMMR0/ |
H A D | CPUMR0A.asm | 26 %include "iprt/x86.mac" 494 ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer 563 ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer 629 ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer 688 ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
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/vbox/src/VBox/RDP/client-1.8.3/ |
H A D | config.sub | 268 | x86 | xscale | xstormy16 | xtensa \ 343 | x86-* | x86_64-* | xps100-* | xscale-* | xstormy16-* \ 773 pentiumpro | p6 | 6x86 | athlon | athlon_*) 785 pentiumpro-* | p6-* | 6x86-* | athlon-*) 1144 x86-* | i*86-*)
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/vbox/src/libs/libxml2-2.6.31/ |
H A D | config.sub | 288 | x86 | xc16x | xscale | xscalee[bl] | xstormy16 | xtensa \ 371 | x86-* | x86_64-* | xc16x-* | xps100-* | xscale-* | xscalee[bl]-* \ 834 pentiumpro | p6 | 6x86 | athlon | athlon_*) 846 pentiumpro-* | p6-* | 6x86-* | athlon-*) 1234 x86-* | i*86-*)
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/vbox/src/VBox/Devices/EFI/Firmware/SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/ |
H A D | SecureBootConfigImpl.c | 55 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x02, 0x05, // OBJ_md5 57 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x04, // OBJ_sha224 58 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, // OBJ_sha256 59 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x02, // OBJ_sha384 60 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, // OBJ_sha512
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/vbox/src/VBox/Devices/PC/ipxe/src/crypto/axtls/ |
H A D | aes.c | 110 0x61,0x35,0x57,0xB9,0x86,0xC1,0x1D,0x9E, 130 0x72,0xf8,0xf6,0x64,0x86,0x68,0x98,0x16,
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/vbox/src/VBox/HostDrivers/Support/win/ |
H A D | SUPR3HardenedMainA-win.asm | 127 ; @param 2 The parameter frame size on x86. Multiple of dword.
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/vbox/src/VBox/ValidationKit/bootsectors/ |
H A D | bootsector-pae.asm | 28 %include "iprt/x86.mac"
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H A D | bootsector2-test1.asm | 31 %include "iprt/x86.mac"
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/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.16.0/ |
H A D | xaarop.h | 142 #define ROP_DSPDSoaxx 0x86
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/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.17.1/ |
H A D | xaarop.h | 142 #define ROP_DSPDSoaxx 0x86
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/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.3.0.0/ |
H A D | xaarop.h | 173 #define ROP_DSPDSoaxx 0x86
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