Searched refs:aCpus (Results 51 - 71 of 71) sorted by relevance
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/vbox/src/VBox/VMM/VMMR3/ |
H A D | DBGFMem.cpp | 594 PVMCPU pVCpu = &pVM->aCpus[idCpu];
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H A D | PGMPool.cpp | 844 pVM->aCpus[idCpu].pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL; 855 CPUMSetChangedFlags(&pVM->aCpus[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
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H A D | SELM.cpp | 253 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ 438 PVMCPU pVCpu = &pVM->aCpus[i]; 461 PVMCPU pVCpu = &pVM->aCpus[0]; 624 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ 2597 PVMCPU pVCpu = &pVM->aCpus[0]; 2665 PVMCPU pVCpu = &pVM->aCpus[0];
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H A D | PGMPhys.cpp | 1047 CPUMSetChangedFlags(&pVM->aCpus[i], CPUM_CHANGED_GLOBAL_TLB_FLUSH); 1199 CPUMSetChangedFlags(&pVM->aCpus[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH); 4015 pgmR3PoolClearAllRendezvous(pVM, &pVM->aCpus[0], NULL /* no need to flush the REM TLB as we already did that above */); 4056 PPGMCPU pPGM = &pVM->aCpus[idCpu].pgm.s; 4075 CPUMSetChangedFlags(&pVM->aCpus[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
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H A D | PGMDbg.cpp | 308 PVMCPU pVCpu = &pVM->aCpus[0]; 364 PVMCPU pVCpu = &pVM->aCpus[0]; 1741 pVCpu = &pVM->aCpus[0];
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H A D | CPUMDbg.cpp | 1388 int rc = DBGFR3RegRegisterCpu(pVM, &pVM->aCpus[iCpu], g_aCpumRegGstDescs, true /*fGuestRegs*/); 1390 rc = DBGFR3RegRegisterCpu(pVM, &pVM->aCpus[iCpu], g_aCpumRegHyperDescs, false /*fGuestRegs*/);
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H A D | IOM.cpp | 252 PVMCPU pVCpu = &pVM->aCpus[iCpu]; 320 PVMCPU pVCpu = &pVM->aCpus[iCpu];
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H A D | PATMPatch.cpp | 364 dest = pVM->pVMRC + RT_OFFSETOF(VM, aCpus[0].fLocalForcedActions); 451 int rc = PGMPhysSimpleReadGCPtr(&pVM->aCpus[0], pDest, pSrc, cb);
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H A D | CSAM.cpp | 356 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VPCU */
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H A D | PATM.cpp | 637 rc = PGMPhysSimpleReadGCPtr(&pDisInfo->pVM->aCpus[0], &pDis->abInstr[offInstr], uSrcAddr, cbMinRead);
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/vbox/src/VBox/VMM/VMMR0/ |
H A D | HMSVMR0.cpp | 472 PVMCPU pVCpu = &pVM->aCpus[i]; 529 PVMCPU pVCpu = &pVM->aCpus[i]; 537 PVMCPU pVCpu = &pVM->aCpus[i]; 676 PVMCPU pVCpu = &pVM->aCpus[i]; 677 PSVMVMCB pVmcb = (PSVMVMCB)pVM->aCpus[i].hm.s.svm.pvVmcb; 1077 int rc = pVM->hm.s.pfnHost32ToGuest64R0(pVM, RT_OFFSETOF(VM, aCpus[pVCpu->idCpu].cpum) - RT_OFFSETOF(VM, cpum));
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H A D | CPUMR0.cpp | 319 pVM->aCpus[i].cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST;
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H A D | HMVMXR0.cpp | 888 PVMCPU pVCpu = &pVM->aCpus[i]; 937 PVMCPU pVCpu = &pVM->aCpus[i]; 949 (&pVM->aCpus[0])->hm.s.u32HMError = VMX_UFC_INVALID_VMCS_SIZE, 978 PVMCPU pVCpu = &pVM->aCpus[i]; 2775 PVMCPU pVCpu = &pVM->aCpus[i]; 5274 rc = pVM->hm.s.pfnHost32ToGuest64R0(pVM, RT_OFFSETOF(VM, aCpus[pVCpu->idCpu].cpum) - RT_OFFSETOF(VM, cpum)); 5339 aParam[4] = VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache); 5366 AssertMsg(pCache->TestIn.pCache == VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache), 5367 ("%RGv vs %RGv\n", pCache->TestIn.pCache, VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache)));
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/vbox/src/VBox/VMM/VMMAll/ |
H A D | SELMAll.cpp | 873 PVMCPU pVCpu = &pVM->aCpus[0];
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H A D | CPUMAllRegs.cpp | 1636 PVMCPU pVCpu = &pVM->aCpus[i]; 1797 PVMCPU pVCpu = &pVM->aCpus[i];
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H A D | TMAll.cpp | 254 PVMCPU pVCpuDst = &pVM->aCpus[pVM->tm.s.idTimerCpu]; 773 PVMCPU pVCpuDst = &pVM->aCpus[pVM->tm.s.idTimerCpu];
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H A D | PGMAllHandler.cpp | 1616 PVMCPU pVCpu = &pVM->aCpus[i];
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H A D | PGMAll.cpp | 2764 PVMCPU pVCpu = &pVM->aCpus[0];
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H A D | PGMAllPool.cpp | 5333 pgmR3ExitShadowModeBeforePoolFlush(&pVM->aCpus[i]); 5449 PVMCPU pVCpu = &pVM->aCpus[i];
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/vbox/src/VBox/VMM/testcase/ |
H A D | tstVMStruct.h | 1381 GEN_CHECK_OFF(VM, aCpus);
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/vbox/src/recompiler/ |
H A D | VBoxRecompiler.c | 751 PVMCPU pVCpu = &pVM->aCpus[i];
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Completed in 269 milliseconds
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