Searched defs:emac_base (Results 1 - 5 of 5) sorted by relevance
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
H A D | lm_power.c | 295 u32_t emac_base = 0 ; local 315 emac_base = ( 0 == PORT_ID(pdev) ) ? GRCBASE_EMAC0 : GRCBASE_EMAC1 ; 321 REG_WR(pdev, emac_base+ offset , b_enable_mpkt ? val:0); 326 REG_WR(pdev, emac_base+ offset, b_enable_mpkt ? val:0);
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H A D | lm_hw_access.c | 927 u32_t emac_base = (port_idx) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local 936 reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED); 941 REG_WR(pdev, emac_base+ EMAC_REG_EMAC_LED, reg_val); 945 reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED); 950 REG_WR(pdev, emac_base+ EMAC_REG_EMAC_LED, reg_val); 954 reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED); 959 REG_WR(pdev, emac_base+ EMAC_REG_EMAC_LED, reg_val); 963 reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED); 968 REG_WR(pdev, emac_base+ EMAC_REG_EMAC_LED, reg_val); 989 reg_val = REG_RD(pdev, emac_base 1025 u32_t emac_base = (port_idx) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local 1097 u32_t emac_base = (port_idx) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local [all...] |
H A D | lm_phy.c | 247 u32_t emac_base = (port?GRCBASE_EMAC1:GRCBASE_EMAC0); local 255 tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); 258 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE,tmp); 267 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_COMM,tmp); 274 tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_COMM); 295 tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); 298 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE,tmp); 321 u32_t emac_base = (port?GRCBASE_EMAC1:GRCBASE_EMAC0); local 329 val=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); 332 REG_WR(pdev,emac_base [all...] |
H A D | lm_stats.c | 694 u32_t emac_base = 0 ; local 704 emac_base = ( 0 == PORT_ID(pdev) ) ? GRCBASE_EMAC0 : GRCBASE_EMAC1 ; 710 dummy = REG_RD( pdev, emac_base + reg_start[i]+(j*sizeof(u32_t))) ; /*Clear stats registers by reading from from ReadClear RX/RXerr/TX STAT banks*/ 1199 const u32_t emac_base = (PORT_ID(pdev)==0) ? GRCBASE_EMAC0 : GRCBASE_EMAC1; local 1207 sges[0].source_offset = emac_base + EMAC_REG_EMAC_RX_STAT_IFHCINOCTETS; 1211 sges[1].source_offset = emac_base + EMAC_REG_EMAC_RX_STAT_FALSECARRIERERRORS; 1215 sges[2].source_offset = emac_base + EMAC_REG_EMAC_TX_STAT_IFHCOUTOCTETS;
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/ |
H A D | bnxe_clc.c | 69 #define EMAC_RD(cb, reg) REG_RD(cb, emac_base + reg) 70 #define EMAC_WR(cb, reg, val) REG_WR(cb, emac_base + reg, val) 1557 u32 emac_base = params->port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local 1564 val_xoff = REG_RD(cb, emac_base + 1567 val_xon = REG_RD(cb, emac_base + EMAC_REG_RX_PFC_STATS_XON_RCVD); 1573 val_xoff = REG_RD(cb, emac_base + 1576 val_xon = REG_RD(cb, emac_base + EMAC_REG_RX_PFC_STATS_XON_SENT); 1607 u32 emac_base) 1614 cur_mode = REG_RD(cb, emac_base + EMAC_REG_EMAC_MDIO_MODE); 1632 REG_WR(cb, emac_base 1606 elink_set_mdio_clk(struct elink_dev *cb, u32 chip_id, u32 emac_base) argument 1670 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local 2009 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local 2827 u32 emac_base = 0; local 3609 u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local 6983 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; local [all...] |
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