Searched defs:dtrh (Results 1 - 9 of 9) sorted by relevance

/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-channel-fp.c29 __hal_channel_dtr_alloc(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
44 *dtrh = channel->reserve_arr[--channel->reserve_length];
46 xge_debug_channel(XGE_TRACE, "dtrh 0x"XGE_OS_LLXFMT" allocated, "
48 (unsigned long long)(ulong_t)*dtrh,
106 *dtrh = NULL;
111 __hal_channel_dtr_restore(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, argument
116 /* restore a previously allocated dtrh at current offset and update
117 * the available reserve length accordingly. If dtrh is null just
120 if (dtrh) {
121 channel->reserve_arr[channel->reserve_length + offset] = dtrh;
138 __hal_channel_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
152 __hal_channel_dtr_try_complete(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
177 __hal_channel_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
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H A Dxgehal-channel.c37 xge_hal_dtr_h *dtrh)
45 *dtrh = channel->reserve_arr[channel->reserve_top++];
56 __hal_channel_dtr_next_freelist(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
64 *dtrh = channel->free_arr[channel->free_length++];
77 xge_hal_dtr_h *dtrh)
82 __hal_channel_dtr_try_complete(channelh, dtrh);
83 if (*dtrh == NULL) {
87 rxdp = (xge_hal_ring_rxd_1_t *)*dtrh;
36 __hal_channel_dtr_next_reservelist(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
76 __hal_channel_dtr_next_not_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
H A Dxgehal-fifo.c157 xge_hal_dtr_h dtrh; local
296 dtrh = fifo->channel.reserve_arr[i];
299 fifo->channel.reserve_arr[max_arr_index - i] = dtrh;
490 __hal_fifo_dtr_align_free_unmap(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
493 xge_hal_fifo_txd_t *txdp = (xge_hal_fifo_txd_t *)dtrh;
521 __hal_fifo_dtr_align_alloc_map(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
524 xge_hal_fifo_txd_t *txdp = (xge_hal_fifo_txd_t *)dtrh;
549 __hal_fifo_dtr_align_free_unmap(channelh, dtrh);
H A Dxgehal-ring-fp.c29 __hal_ring_rxd_priv(xge_hal_ring_t *ring, xge_hal_dtr_h dtrh) argument
32 xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
40 xge_hal_ring_rxd_5_t *rxdp_5 = (xge_hal_ring_rxd_5_t *)dtrh;
102 * @dtrh: Descriptor handle.
111 xge_hal_ring_dtr_private(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
113 return (char *)__hal_ring_rxd_priv((xge_hal_ring_t *) channelh, dtrh) +
120 * @dtrh: Reserved descriptor. On success HAL fills this "out" parameter
135 xge_hal_ring_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
149 status = __hal_channel_dtr_alloc(channelh, dtrh);
159 xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)*dtrh;
185 xge_hal_ring_dtr_info_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, xge_hal_dtr_info_t *ext_info) argument
224 xge_hal_ring_dtr_info_nb_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, xge_hal_dtr_info_t *ext_info) argument
266 xge_hal_ring_dtr_1b_set(xge_hal_dtr_h dtrh, dma_addr_t dma_pointer, int size) argument
297 xge_hal_ring_dtr_1b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, dma_addr_t *dma_pointer, int *pkt_length) argument
327 xge_hal_ring_dtr_3b_set(xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[], int sizes[]) argument
362 xge_hal_ring_dtr_3b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[], int sizes[]) argument
399 xge_hal_ring_dtr_5b_set(xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[], int sizes[]) argument
439 xge_hal_ring_dtr_5b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[], int sizes[]) argument
472 xge_hal_ring_dtr_pre_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
542 xge_hal_ring_dtr_post_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
576 xge_hal_ring_dtr_post_post_wmb(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
619 xge_hal_ring_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
661 xge_hal_ring_dtr_next_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh, u8 *t_code) argument
769 xge_hal_ring_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
810 xge_hal_dtr_h dtrh; local
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H A Dxgehal-fifo-fp.c29 __hal_fifo_txdl_priv(xge_hal_dtr_h dtrh) argument
31 xge_hal_fifo_txd_t *txdp = (xge_hal_fifo_txd_t*)dtrh;
48 __hal_fifo_dtr_post_single(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, argument
53 xge_hal_fifo_txd_t *txdp = (xge_hal_fifo_txd_t *)dtrh;
64 txdl_priv = __hal_fifo_txdl_priv(dtrh);
105 __hal_channel_dtr_post(channelh, dtrh);
137 "freeing corrupt dtrh %p, fragments %d list size %d",
143 "freeing linked dtrh %p, fragments %d list size %d",
159 "freed linked dtrh fragments %d list size %d",
189 "dtrh
207 xge_hal_fifo_dtr_private(xge_hal_dtr_h dtrh) argument
227 xge_hal_fifo_dtr_buffer_cnt(xge_hal_dtr_h dtrh) argument
256 xge_hal_fifo_dtr_reserve_many(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh, const int frags) argument
402 xge_hal_fifo_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh) argument
500 xge_hal_fifo_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh) argument
585 xge_hal_dtr_h dtrh = dtrs[i]; local
647 xge_hal_fifo_dtr_next_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh, u8 *t_code) argument
833 xge_hal_fifo_dtr_buffer_set_aligned(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, int frag_idx, void *vaddr, dma_addr_t dma_pointer, int size, int misaligned_size) argument
925 xge_hal_fifo_dtr_buffer_append(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, void *vaddr, int size) argument
966 xge_hal_fifo_dtr_buffer_finalize(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, int frag_idx) argument
1037 xge_hal_fifo_dtr_buffer_set(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, int frag_idx, dma_addr_t dma_pointer, int size) argument
1083 xge_hal_fifo_dtr_mss_set(xge_hal_dtr_h dtrh, int mss) argument
1112 xge_hal_fifo_dtr_cksum_set_bits(xge_hal_dtr_h dtrh, u64 cksum_bits) argument
1130 xge_hal_fifo_dtr_vlan_set(xge_hal_dtr_h dtrh, u16 vlan_tag) argument
1146 xge_hal_dtr_h dtrh; local
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H A Dxgehal-device.c5625 * @dtrh: Descriptor handle.
5640 xge_hal_dtr_h dtrh, u8 t_code)
5654 xge_hal_fifo_txd_t *txdp = (xge_hal_fifo_txd_t *)dtrh;
5694 xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
5639 xge_hal_device_handle_tcode(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, u8 t_code) argument
/illumos-gate/usr/src/uts/common/io/xge/drv/
H A Dxgell.c1565 xgell_rx_dtr_term(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, argument
1569 ((xgell_rxd_priv_t *)xge_hal_ring_dtr_private(channelh, dtrh));
1576 xge_hal_ring_dtr_free(channelh, dtrh);
1719 xgell_tx_term(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh, argument
1723 ((xgell_txd_priv_t *)xge_hal_fifo_dtr_private(dtrh));
1742 xge_hal_fifo_dtr_free(channelh, dtrh);
/illumos-gate/usr/src/lib/libdtrace/common/
H A Ddt_consume.c2857 dtrace_rechdr_t *dtrh = local
2860 if (dtrh->dtrh_epid == DTRACE_EPIDNONE) {
2863 return (DTRACE_RECORD_LOAD_TIMESTAMP(dtrh));
/illumos-gate/usr/src/uts/common/dtrace/
H A Ddtrace.c2804 dtrace_rechdr_t *dtrh = (dtrace_rechdr_t *)saddr; local
2806 if (dtrh->dtrh_epid == DTRACE_EPIDNONE) {
2810 ASSERT3U(dtrh->dtrh_epid, <=, state->dts_necbs);
2811 size = state->dts_ecbs[dtrh->dtrh_epid - 1]->dte_size;
2815 ASSERT3U(DTRACE_RECORD_LOAD_TIMESTAMP(dtrh), ==, UINT64_MAX);
2817 DTRACE_RECORD_STORE_TIMESTAMP(dtrh, timestamp);
7018 dtrace_rechdr_t dtrh; local
7024 dtrh.dtrh_epid = ecb->dte_epid;
7025 DTRACE_RECORD_STORE_TIMESTAMP(&dtrh,
7027 *((dtrace_rechdr_t *)(tomax + offs)) = dtrh;
7193 dtrace_rechdr_t *dtrh; local
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