Searched defs:HC_REG_LEADING_EDGE_1 (Results 1 - 1 of 1) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h4850 #define HC_REG_LEADING_EDGE_1 0x108048UL //ACCESS:RW DataWidth:0x10 SPLIT:4 Description: port 1 attn bit condition monitoring; each bit that is set will lock a change fron 0 to 1 in the corresponding attention signals that comes from the AEU macro
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