| /vbox/src/VBox/Runtime/testcase/ |
| H A D | tstLdrDisasmTest.cpp | 104 MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d Cpu: bOpCode=%#x pCurInstr=%p (42=%d)\n", \
112 DISCPUSTATE Cpu; local
118 memset(&Cpu, 0, sizeof(Cpu));
122 rc = MyDisasm(CodeIndex, &Cpu, &cb); \
125 if (Cpu.pCurInstr->uOpcode != (enmOp)) \
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| H A D | tstLdrObj.cpp | 99 DISCPUSTATE Cpu; local
100 DISInstr((void *)(uintptr_t)SomeExportFunction3, DISCPUMODE_32BIT, &Cpu, &cb);
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| H A D | tstLdrObjR0.cpp | 95 DISCPUSTATE Cpu; local
97 memset(&Cpu, 0, sizeof(Cpu));
99 DISInstr((void *)(uintptr_t)SomeExportFunction3, DISCPUMODE_32BIT, &Cpu, &cb);
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| H A D | tstLdr-2.cpp | 43 DISCPUSTATE Cpu; local
49 if (RT_FAILURE(DISInstrToStr(pbCodeBlock + i, DISCPUMODE_32BIT, &Cpu, &cbInstr, szOutput, sizeof(szOutput))))
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| H A D | tstLdr-3.cpp | 161 DISCPUSTATE Cpu; local
171 &Cpu, &cbInstr);
177 DISFormatYasmEx(&Cpu, szOutput, sizeof(szOutput),
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| /vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/MemoryTest/GenericMemoryTestDxe/ |
| H A D | LightMemoryTest.h | 22 #include <Protocol/Cpu.h>
88 // Cpu arch protocol's pointer
90 EFI_CPU_ARCH_PROTOCOL *Cpu; member in struct:__anon11190
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| H A D | LightMemoryTest.c | 331 if (Private->Cpu != NULL) {
332 Private->Cpu->FlushDataCache (Private->Cpu, Start, Size, EfiCpuFlushTypeWriteBackInvalidate);
442 EFI_CPU_ARCH_PROTOCOL *Cpu; local
472 (VOID **) &Cpu
475 Private->Cpu = Cpu;
798 Private->Cpu->FlushDataCache (Private->Cpu, TestAddress, 1, EfiCpuFlushTypeWriteBackInvalidate);
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| /vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/SmmPeriodicSmiLib/ |
| H A D | SmmPeriodicSmiLib.c | 65 /// The Cpu number that is required to execute DispatchFunction. If Cpu is
69 UINTN Cpu; member in struct:__anon12457
818 if ((PeriodicSmiLibraryHandler->Cpu == PERIODIC_SMI_LIBRARY_ANY_CPU) ||
819 (PeriodicSmiLibraryHandler->Cpu == gSmst->CurrentlyExecutingCpu) ) {
839 PeriodicSmiLibraryHandler->Cpu,
887 @param[in] Cpu Specifies the CPU that is required to execute
888 the periodic SMI handler. If Cpu is
892 periodic SMIs. If Cpu is between 0 and the SMST
903 @retval EFI_INVALID_PARAMETER Cpu i
914 PeriodicSmiEnable( IN OUT EFI_HANDLE *DispatchHandle, OPTIONAL IN PERIODIC_SMI_LIBRARY_HANDLER DispatchFunction, IN CONST VOID *Context, OPTIONAL IN UINT64 TickPeriod, IN UINTN Cpu, IN UINTN StackSize ) argument
[all...] |
| /vbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Application/Ping6/ |
| H A D | Ping6.c | 25 #include <Protocol/Cpu.h>
76 EFI_CPU_ARCH_PROTOCOL *Cpu; local
80 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &Cpu);
86 Status = Cpu->GetTimerValue (Cpu, 0, &CurrentTick, &TimerPeriod);
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| /vbox/src/VBox/VMM/VMMR3/ |
| H A D | EMRaw.cpp | 459 DISCPUSTATE Cpu;
460 int rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "IO EMU");
465 if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
467 switch (Cpu.pCurInstr->uOpcode)
472 rcStrict = IOMInterpretIN(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
479 rcStrict = IOMInterpretOUT(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
484 else if (Cpu.fPrefix & DISPREFIX_REP)
486 switch (Cpu.pCurInstr->uOpcode)
492 rcStrict = IOMInterpretINS(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
500 rcStrict = IOMInterpretOUTS(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
709 DISCPUSTATE Cpu; local
812 DISCPUSTATE Cpu; local
996 DISCPUSTATE Cpu; local
[all...] |
| H A D | DBGFDisas.cpp | 56 DISCPUSTATE Cpu; member in struct:__anon16844
158 &pState->Cpu,
159 &pState->Cpu,
187 int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
344 else if ( pState->Cpu.uCpuMode == DISCPUMODE_64BIT
358 && PATMIsPatchGCAddr(pState->pVM, pState->Cpu.uInstrAddr)
571 if (State.Cpu.cbCachedInstr)
572 RTStrPrintf(pszOutput, cbOutput, "Disas -> %Rrc; %.*Rhxs\n", rc, (size_t)State.Cpu.cbCachedInstr, State.Cpu.abInstr);
582 DISFormatYasmEx(&State.Cpu, szBu
[all...] |
| H A D | PATM.cpp | 6448 DISCPUSTATE Cpu; local
6449 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pEip, &Cpu, "PIF Trap: ");
6453 && ( Cpu.pCurInstr->uOpcode == OP_PUSHF
6454 || Cpu.pCurInstr->uOpcode == OP_PUSH
6455 || Cpu.pCurInstr->uOpcode == OP_CALL)
6462 if (Cpu.pCurInstr->uOpcode == OP_PUSH)
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| /vbox/src/VBox/VMM/VMMRC/ |
| H A D | TRPMRCHandlers.cpp | 556 DISCPUSTATE Cpu; local
558 rc = EMInterpretDisasOneEx(pVM, pVCpu, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
571 if ( Cpu.pCurInstr->uOpcode == OP_ILLUD2
593 else if (Cpu.fPrefix & DISPREFIX_LOCK)
595 Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->uOpcode));
607 else if (Cpu.pCurInstr->uOpcode == OP_MONITOR)
610 rc = EMInterpretInstructionDisasState(pVCpu, &Cpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
615 rc = GIMXcptUD(pVCpu, CPUMCTX_FROM_CORE(pRegFrame), &Cpu);
1061 DISCPUSTATE Cpu; local
1063 rc = EMInterpretDisasOneEx(pVM, pVCpu, PC, pRegFrame, &Cpu,
[all...] |
| /vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Pi/ |
| H A D | PiHob.h | 445 EFI_HOB_CPU *Cpu; member in union:__anon11995
|
| /vbox/src/VBox/Devices/PC/ipxe/src/include/ipxe/efi/Pi/ |
| H A D | PiHob.h | 444 EFI_HOB_CPU *Cpu; member in union:__anon15597
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| /vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/ |
| H A D | LegacyBiosInterface.h | 31 #include <Protocol/Cpu.h>
547 EFI_CPU_ARCH_PROTOCOL *Cpu; member in struct:__anon10435
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| /vbox/src/recompiler/ |
| H A D | VBoxRecompiler.c | 4090 DISCPUSTATE Cpu; local
4102 &Cpu, &cbInstr, szOutput, sizeof(szOutput));
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| /vbox/include/VBox/ |
| H A D | settings.h | 798 struct Cpu struct in namespace:settings
800 Cpu() function in struct:settings::Cpu
804 bool operator==(const Cpu &c) const
811 typedef std::list<Cpu> CpuList;
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| /vbox/src/VBox/Devices/Graphics/shaderlib/wine/include/ |
| H A D | dbghelp.h | 841 } Cpu; member in struct:_MINIDUMP_SYSTEM_INFO
|
| /vbox/src/VBox/Additions/WINNT/Graphics/Wine/include/ |
| H A D | dbghelp.h | 781 } Cpu; member in struct:_MINIDUMP_SYSTEM_INFO
|