Cross Reference: /vbox/src/VBox/VMM/VMMR3/TM.cpp

Lines Matching defs:pGip
232     PSUPGLOBALINFOPAGE pGip = g_pSUPGlobalInfoPage;
233     pVM->tm.s.pvGIPR3 = (void *)pGip;
235     AssertMsgReturn((pGip->u32Version >> 16) == (SUPGLOBALINFOPAGE_VERSION >> 16),
236                     ("Unsupported GIP version %#x! (expected=%#x)\n", pGip->u32Version, SUPGLOBALINFOPAGE_VERSION),
245     rc = MMR3HyperMapHCPhys(pVM, pVM->tm.s.pvGIPR3, NIL_RTR0PTR, HCPhysGIP, (size_t)pGip->cPages * PAGE_SIZE,
260     if (    pGip->u32Magic == SUPGLOBALINFOPAGE_MAGIC
261         &&  pGip->u32UpdateIntervalNS >= 250000000 /* 0.25s */)
264                           pGip->u32UpdateIntervalNS, pGip->u32UpdateHz);
268             pGip->u32Mode, SUPGetGIPModeName(pGip), pGip->u32UpdateHz, pGip->u32UpdateIntervalNS,
269             pGip->enmUseTscDelta, SUPGetGIPTscDeltaModeName(pGip), pGip->fGetGipCpu, pGip->cCpus));
271             pGip->u64CpuHz, pGip->u64CpuHz, SUPGetCpuHzFromGip(pGip)));
272     for (uint32_t iCpuSet = 0; iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx); iCpuSet++)
274         uint16_t iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
277                     iCpuSet, pGip->aCPUs[iGipCpu].idCpu, pGip->aCPUs[iGipCpu].idApic, iGipCpu, pGip->aCPUs[iGipCpu].i64TSCDelta,
278                     pGip->aCPUs[iGipCpu].enmState, pGip->aCPUs[iGipCpu].u64CpuHz, pGip->aCPUs[iGipCpu].cErrors));
830     PSUPGLOBALINFOPAGE pGip = g_pSUPGlobalInfoPage;
831     if (pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC)
849                 && pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)       /* No fixed tsc if the gip timer is in async mode. */
871                     && (   pGip->u32Mode == SUPGIPMODE_SYNC_TSC     /* No fixed tsc if the gip timer is in async mode. */
872                         || pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC))
933     PSUPGLOBALINFOPAGE pGip = g_pSUPGlobalInfoPage;
934     if (pGip)
936         u64Hz = pGip->u64CpuHz;
941         u64Hz = SUPGetCpuHzFromGip(pGip);