Lines Matching refs:pVCpu
665 static void pgmR3ModeDataSwitch(PVM pVM, PVMCPU pVCpu, PGMMODE enmShw, PGMMODE enmGst);
1254 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1255 PPGMCPU pPGM = &pVCpu->pgm.s;
1257 pPGM->offVM = (uintptr_t)&pVCpu->pgm.s - (uintptr_t)pVM;
1259 pPGM->offPGM = (uintptr_t)&pVCpu->pgm.s - (uintptr_t)&pVM->pgm.s;
1276 for (unsigned i = 0; i < RT_ELEMENTS(pVCpu->pgm.s.apGstPaePDsR3); i++)
1446 PVMCPU pVCpu = &pVM->aCpus[i];
1447 rc = PGMR3ChangeMode(pVM, pVCpu, PGMMODE_REAL);
1518 PVMCPU pVCpu = &pVM->aCpus[i];
1520 pVCpu->pgm.s.enmShadowMode = PGMMODE_INVALID;
1521 pVCpu->pgm.s.enmGuestMode = PGMMODE_INVALID;
2181 PVMCPU pVCpu = &pVM->aCpus[iCpu];
2186 pVCpu->pgm.s.fGst32BitMbzBigPdeMask = ((uint32_t)(fMbzPageFrameMask >> (32 - 13)) & X86_PDE4M_PG_HIGH_MASK)
2189 pVCpu->pgm.s.fGstPaeMbzPteMask = fMbzPageFrameMask | X86_PTE_PAE_MBZ_MASK_NO_NX;
2190 pVCpu->pgm.s.fGstPaeMbzPdeMask = fMbzPageFrameMask | X86_PDE_PAE_MBZ_MASK_NO_NX;
2191 pVCpu->pgm.s.fGstPaeMbzBigPdeMask = fMbzPageFrameMask | X86_PDE2M_PAE_MBZ_MASK_NO_NX;
2192 pVCpu->pgm.s.fGstPaeMbzPdpeMask = fMbzPageFrameMask | X86_PDPE_PAE_MBZ_MASK;
2194 pVCpu->pgm.s.fGstAmd64MbzPteMask = fMbzPageFrameMask | X86_PTE_LM_MBZ_MASK_NO_NX;
2195 pVCpu->pgm.s.fGstAmd64MbzPdeMask = fMbzPageFrameMask | X86_PDE_LM_MBZ_MASK_NX;
2196 pVCpu->pgm.s.fGstAmd64MbzBigPdeMask = fMbzPageFrameMask | X86_PDE2M_LM_MBZ_MASK_NX;
2197 pVCpu->pgm.s.fGstAmd64MbzPdpeMask = fMbzPageFrameMask | X86_PDPE_LM_MBZ_MASK_NO_NX;
2198 pVCpu->pgm.s.fGstAmd64MbzBigPdpeMask = fMbzPageFrameMask | X86_PDPE1G_LM_MBZ_MASK_NO_NX;
2199 pVCpu->pgm.s.fGstAmd64MbzPml4eMask = fMbzPageFrameMask | X86_PML4E_MBZ_MASK_NO_NX;
2201 pVCpu->pgm.s.fGst64ShadowedPteMask = X86_PTE_P | X86_PTE_RW | X86_PTE_US | X86_PTE_G | X86_PTE_A | X86_PTE_D;
2202 pVCpu->pgm.s.fGst64ShadowedPdeMask = X86_PDE_P | X86_PDE_RW | X86_PDE_US | X86_PDE_A;
2203 pVCpu->pgm.s.fGst64ShadowedBigPdeMask = X86_PDE4M_P | X86_PDE4M_RW | X86_PDE4M_US | X86_PDE4M_A;
2204 pVCpu->pgm.s.fGst64ShadowedBigPde4PteMask =
2206 pVCpu->pgm.s.fGstAmd64ShadowedPdpeMask = X86_PDPE_P | X86_PDPE_RW | X86_PDPE_US | X86_PDPE_A;
2207 pVCpu->pgm.s.fGstAmd64ShadowedPml4eMask = X86_PML4E_P | X86_PML4E_RW | X86_PML4E_US | X86_PML4E_A;
2299 PVMCPU pVCpu = &pVM->aCpus[i];
2301 pgmR3ModeDataSwitch(pVM, pVCpu, pVCpu->pgm.s.enmShadowMode, pVCpu->pgm.s.enmGuestMode);
2303 PGM_SHW_PFN(Relocate, pVCpu)(pVCpu, offDelta);
2304 PGM_GST_PFN(Relocate, pVCpu)(pVCpu, offDelta);
2305 PGM_BTH_PFN(Relocate, pVCpu)(pVCpu, offDelta);
2475 * @param pVCpu Pointer to the VMCPU.
2477 VMMR3DECL(void) PGMR3ResetCpu(PVM pVM, PVMCPU pVCpu)
2479 int rc = PGM_GST_PFN(Exit, pVCpu)(pVCpu);
2482 rc = PGMR3ChangeMode(pVM, pVCpu, PGMMODE_REAL);
2485 STAM_REL_COUNTER_RESET(&pVCpu->pgm.s.cGuestModeChanges);
2487 pgmR3PoolResetUnpluggedCpu(pVM, pVCpu);
2492 pVCpu->pgm.s.fA20Enabled = true;
2493 pVCpu->pgm.s.GCPhysA20Mask = ~((RTGCPHYS)!pVCpu->pgm.s.fA20Enabled << 20);
2498 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2499 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
2532 PVMCPU pVCpu = &pVM->aCpus[i];
2533 int rc = PGM_GST_PFN(Exit, pVCpu)(pVCpu);
2547 PVMCPU pVCpu = &pVM->aCpus[i];
2549 int rc = PGMR3ChangeMode(pVM, pVCpu, PGMMODE_REAL);
2552 STAM_REL_COUNTER_RESET(&pVCpu->pgm.s.cGuestModeChanges);
2553 STAM_REL_COUNTER_RESET(&pVCpu->pgm.s.cA20Changes);
2566 PVMCPU pVCpu = &pVM->aCpus[i];
2568 pVCpu->pgm.s.fGst32BitPageSizeExtension = false;
2569 PGMNotifyNxeChanged(pVCpu, false);
2571 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2572 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
2574 if (!pVCpu->pgm.s.fA20Enabled)
2576 pVCpu->pgm.s.fA20Enabled = true;
2577 pVCpu->pgm.s.GCPhysA20Mask = ~((RTGCPHYS)!pVCpu->pgm.s.fA20Enabled << 20);
2579 pVCpu->pgm.s.fSyncFlags |= PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL;
2580 VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2581 pgmR3RefreshShadowModeAfterA20Change(pVCpu);
2582 HMFlushTLB(pVCpu);
2750 PVMCPU pVCpu = &pVM->aCpus[0];
2754 const bool fPSE = !!(CPUMGetGuestCR4(pVCpu) & X86_CR4_PSE);
2757 const bool fPGE = !!(CPUMGetGuestCR4(pVCpu) & X86_CR4_PGE);
2765 PX86PD pPDSrc = pgmGstGet32bitPDPtr(pVCpu);
3090 * @param pVCpu Pointer to the VMCPU.
3094 static void pgmR3ModeDataSwitch(PVM pVM, PVMCPU pVCpu, PGMMODE enmShw, PGMMODE enmGst)
3102 pVCpu->pgm.s.pfnR3ShwRelocate = pModeData->pfnR3ShwRelocate;
3103 pVCpu->pgm.s.pfnR3ShwExit = pModeData->pfnR3ShwExit;
3104 pVCpu->pgm.s.pfnR3ShwGetPage = pModeData->pfnR3ShwGetPage;
3105 Assert(pVCpu->pgm.s.pfnR3ShwGetPage);
3106 pVCpu->pgm.s.pfnR3ShwModifyPage = pModeData->pfnR3ShwModifyPage;
3108 pVCpu->pgm.s.pfnRCShwGetPage = pModeData->pfnRCShwGetPage;
3109 pVCpu->pgm.s.pfnRCShwModifyPage = pModeData->pfnRCShwModifyPage;
3111 pVCpu->pgm.s.pfnR0ShwGetPage = pModeData->pfnR0ShwGetPage;
3112 pVCpu->pgm.s.pfnR0ShwModifyPage = pModeData->pfnR0ShwModifyPage;
3116 pVCpu->pgm.s.pfnR3GstRelocate = pModeData->pfnR3GstRelocate;
3117 pVCpu->pgm.s.pfnR3GstExit = pModeData->pfnR3GstExit;
3118 pVCpu->pgm.s.pfnR3GstGetPage = pModeData->pfnR3GstGetPage;
3119 Assert(pVCpu->pgm.s.pfnR3GstGetPage);
3120 pVCpu->pgm.s.pfnR3GstModifyPage = pModeData->pfnR3GstModifyPage;
3121 pVCpu->pgm.s.pfnR3GstGetPDE = pModeData->pfnR3GstGetPDE;
3122 pVCpu->pgm.s.pfnRCGstGetPage = pModeData->pfnRCGstGetPage;
3123 pVCpu->pgm.s.pfnRCGstModifyPage = pModeData->pfnRCGstModifyPage;
3124 pVCpu->pgm.s.pfnRCGstGetPDE = pModeData->pfnRCGstGetPDE;
3125 pVCpu->pgm.s.pfnR0GstGetPage = pModeData->pfnR0GstGetPage;
3126 pVCpu->pgm.s.pfnR0GstModifyPage = pModeData->pfnR0GstModifyPage;
3127 pVCpu->pgm.s.pfnR0GstGetPDE = pModeData->pfnR0GstGetPDE;
3130 pVCpu->pgm.s.pfnR3BthRelocate = pModeData->pfnR3BthRelocate;
3131 pVCpu->pgm.s.pfnR3BthInvalidatePage = pModeData->pfnR3BthInvalidatePage;
3132 pVCpu->pgm.s.pfnR3BthSyncCR3 = pModeData->pfnR3BthSyncCR3;
3133 Assert(pVCpu->pgm.s.pfnR3BthSyncCR3);
3134 pVCpu->pgm.s.pfnR3BthPrefetchPage = pModeData->pfnR3BthPrefetchPage;
3135 pVCpu->pgm.s.pfnR3BthVerifyAccessSyncPage = pModeData->pfnR3BthVerifyAccessSyncPage;
3137 pVCpu->pgm.s.pfnR3BthAssertCR3 = pModeData->pfnR3BthAssertCR3;
3139 pVCpu->pgm.s.pfnR3BthMapCR3 = pModeData->pfnR3BthMapCR3;
3140 pVCpu->pgm.s.pfnR3BthUnmapCR3 = pModeData->pfnR3BthUnmapCR3;
3142 pVCpu->pgm.s.pfnRCBthTrap0eHandler = pModeData->pfnRCBthTrap0eHandler;
3143 pVCpu->pgm.s.pfnRCBthInvalidatePage = pModeData->pfnRCBthInvalidatePage;
3144 pVCpu->pgm.s.pfnRCBthSyncCR3 = pModeData->pfnRCBthSyncCR3;
3145 pVCpu->pgm.s.pfnRCBthPrefetchPage = pModeData->pfnRCBthPrefetchPage;
3146 pVCpu->pgm.s.pfnRCBthVerifyAccessSyncPage = pModeData->pfnRCBthVerifyAccessSyncPage;
3148 pVCpu->pgm.s.pfnRCBthAssertCR3 = pModeData->pfnRCBthAssertCR3;
3150 pVCpu->pgm.s.pfnRCBthMapCR3 = pModeData->pfnRCBthMapCR3;
3151 pVCpu->pgm.s.pfnRCBthUnmapCR3 = pModeData->pfnRCBthUnmapCR3;
3153 pVCpu->pgm.s.pfnR0BthTrap0eHandler = pModeData->pfnR0BthTrap0eHandler;
3154 pVCpu->pgm.s.pfnR0BthInvalidatePage = pModeData->pfnR0BthInvalidatePage;
3155 pVCpu->pgm.s.pfnR0BthSyncCR3 = pModeData->pfnR0BthSyncCR3;
3156 pVCpu->pgm.s.pfnR0BthPrefetchPage = pModeData->pfnR0BthPrefetchPage;
3157 pVCpu->pgm.s.pfnR0BthVerifyAccessSyncPage = pModeData->pfnR0BthVerifyAccessSyncPage;
3159 pVCpu->pgm.s.pfnR0BthAssertCR3 = pModeData->pfnR0BthAssertCR3;
3161 pVCpu->pgm.s.pfnR0BthMapCR3 = pModeData->pfnR0BthMapCR3;
3162 pVCpu->pgm.s.pfnR0BthUnmapCR3 = pModeData->pfnR0BthUnmapCR3;
3365 * @param pVCpu Pointer to the VMCPU.
3369 VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode)
3372 bool fIsOldGuestPagingMode64Bits = (pVCpu->pgm.s.enmGuestMode >= PGMMODE_AMD64);
3376 Log(("PGMR3ChangeMode: Guest mode: %s -> %s\n", PGMGetModeName(pVCpu->pgm.s.enmGuestMode), PGMGetModeName(enmGuestMode)));
3377 STAM_REL_COUNTER_INC(&pVCpu->pgm.s.cGuestModeChanges);
3384 enmShadowMode = pgmR3CalcShadowMode(pVM, enmGuestMode, pVM->pgm.s.enmHostMode, pVCpu->pgm.s.enmShadowMode, &enmSwitcher);
3413 if ( enmShadowMode != pVCpu->pgm.s.enmShadowMode
3416 LogFlow(("PGMR3ChangeMode: Shadow mode: %s -> %s\n", PGMGetModeName(pVCpu->pgm.s.enmShadowMode), PGMGetModeName(enmShadowMode)));
3417 if (PGM_SHW_PFN(Exit, pVCpu))
3419 int rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
3422 AssertMsgFailed(("Exit failed for shadow mode %d: %Rrc\n", pVCpu->pgm.s.enmShadowMode, rc));
3429 LogFlow(("PGMR3ChangeMode: Shadow mode remains: %s\n", PGMGetModeName(pVCpu->pgm.s.enmShadowMode)));
3432 if (PGM_GST_PFN(Exit, pVCpu))
3434 int rc = PGM_GST_PFN(Exit, pVCpu)(pVCpu);
3437 AssertMsgFailed(("Exit failed for guest mode %d: %Rrc\n", pVCpu->pgm.s.enmGuestMode, rc));
3445 pgmR3ModeDataSwitch(pVM, pVCpu, enmShadowMode, enmGuestMode);
3450 if ( enmShadowMode != pVCpu->pgm.s.enmShadowMode
3454 pVCpu->pgm.s.enmShadowMode = enmShadowMode;
3458 rc = PGM_SHW_NAME_32BIT(Enter)(pVCpu, false);
3462 rc = PGM_SHW_NAME_PAE(Enter)(pVCpu, false);
3466 rc = PGM_SHW_NAME_AMD64(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
3469 rc = PGM_SHW_NAME_NESTED(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
3472 rc = PGM_SHW_NAME_EPT(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
3483 pVCpu->pgm.s.enmShadowMode = PGMMODE_INVALID;
3491 VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
3499 pVCpu->pgm.s.enmGuestMode = enmGuestMode;
3503 rc = PGM_GST_NAME_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
3504 switch (pVCpu->pgm.s.enmShadowMode)
3507 rc2 = PGM_BTH_NAME_32BIT_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
3511 rc2 = PGM_BTH_NAME_PAE_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
3514 rc2 = PGM_BTH_NAME_NESTED_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
3517 rc2 = PGM_BTH_NAME_EPT_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
3527 rc = PGM_GST_NAME_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
3528 switch (pVCpu->pgm.s.enmShadowMode)
3531 rc2 = PGM_BTH_NAME_32BIT_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
3535 rc2 = PGM_BTH_NAME_PAE_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
3538 rc2 = PGM_BTH_NAME_NESTED_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
3541 rc2 = PGM_BTH_NAME_EPT_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
3551 GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & X86_CR3_PAGE_MASK;
3552 rc = PGM_GST_NAME_32BIT(Enter)(pVCpu, GCPhysCR3);
3553 switch (pVCpu->pgm.s.enmShadowMode)
3556 rc2 = PGM_BTH_NAME_32BIT_32BIT(Enter)(pVCpu, GCPhysCR3);
3560 rc2 = PGM_BTH_NAME_PAE_32BIT(Enter)(pVCpu, GCPhysCR3);
3563 rc2 = PGM_BTH_NAME_NESTED_32BIT(Enter)(pVCpu, GCPhysCR3);
3566 rc2 = PGM_BTH_NAME_EPT_32BIT(Enter)(pVCpu, GCPhysCR3);
3580 CPUMGetGuestCpuId(pVCpu, 1, 0, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
3585 GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & X86_CR3_PAE_PAGE_MASK;
3586 rc = PGM_GST_NAME_PAE(Enter)(pVCpu, GCPhysCR3);
3587 switch (pVCpu->pgm.s.enmShadowMode)
3591 rc2 = PGM_BTH_NAME_PAE_PAE(Enter)(pVCpu, GCPhysCR3);
3594 rc2 = PGM_BTH_NAME_NESTED_PAE(Enter)(pVCpu, GCPhysCR3);
3597 rc2 = PGM_BTH_NAME_EPT_PAE(Enter)(pVCpu, GCPhysCR3);
3611 GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & UINT64_C(0xfffffffffffff000); /** @todo define this mask! */
3612 rc = PGM_GST_NAME_AMD64(Enter)(pVCpu, GCPhysCR3);
3613 switch (pVCpu->pgm.s.enmShadowMode)
3617 rc2 = PGM_BTH_NAME_AMD64_AMD64(Enter)(pVCpu, GCPhysCR3);
3620 rc2 = PGM_BTH_NAME_NESTED_AMD64(Enter)(pVCpu, GCPhysCR3);
3623 rc2 = PGM_BTH_NAME_EPT_AMD64(Enter)(pVCpu, GCPhysCR3);
3651 HMR3PagingModeChanged(pVM, pVCpu, pVCpu->pgm.s.enmShadowMode, pVCpu->pgm.s.enmGuestMode);
3660 * @param pVCpu Pointer to the VMCPU.
3662 int pgmR3ExitShadowModeBeforePoolFlush(PVMCPU pVCpu)
3665 int rc = PGM_BTH_PFN(UnmapCR3, pVCpu)(pVCpu);
3669 rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
3671 Assert(pVCpu->pgm.s.pShwPageCR3R3 == NULL);
3681 * @param pVCpu Pointer to the VMCPU.
3683 int pgmR3ReEnterShadowModeAfterPoolFlush(PVM pVM, PVMCPU pVCpu)
3685 pVCpu->pgm.s.enmShadowMode = PGMMODE_INVALID;
3686 int rc = PGMR3ChangeMode(pVM, pVCpu, PGMGetGuestMode(pVCpu));
3687 Assert(VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
3691 Assert(pVCpu->pgm.s.pShwPageCR3R3 != NULL);
3692 AssertMsg( pVCpu->pgm.s.enmShadowMode >= PGMMODE_NESTED
3693 || CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu),
3694 ("%RHp != %RHp %s\n", (RTHCPHYS)CPUMGetHyperCR3(pVCpu), PGMGetHyperCR3(pVCpu), PGMGetModeName(pVCpu->pgm.s.enmShadowMode)));
3702 * @param pVCpu Pointer to the VMCPU.
3704 void pgmR3RefreshShadowModeAfterA20Change(PVMCPU pVCpu)
3707 int rc = pgmR3ExitShadowModeBeforePoolFlush(pVCpu);
3709 rc = pgmR3ReEnterShadowModeAfterPoolFlush(pVCpu->CTX_SUFF(pVM), pVCpu);
3763 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, DBGCCmdHlpGetCurrentCpu(pCmdHlp));
3764 if (!pVCpu)
3770 VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
3792 PVMCPU pVCpu = VMMGetCpu(pVM);
3794 *pcErrors = PGMAssertCR3(pVM, pVCpu, CPUMGetGuestCR3(pVCpu), CPUMGetGuestCR4(pVCpu));
3836 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, DBGCCmdHlpGetCurrentCpu(pCmdHlp));
3837 if (!pVCpu)
3844 if (pVCpu->pgm.s.fSyncFlags & PGM_SYNC_ALWAYS)
3846 ASMAtomicAndU32(&pVCpu->pgm.s.fSyncFlags, ~PGM_SYNC_ALWAYS);
3851 ASMAtomicOrU32(&pVCpu->pgm.s.fSyncFlags, PGM_SYNC_ALWAYS);
3852 VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);