Cross Reference: /vbox/src/VBox/VMM/VMMAll/EMAll.cpp

Lines Matching defs:valpar1
2015             uint64_t valpar1, valpar2;
2021                 valpar1 = param1.val.val64;
2028                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, param1.size);
2096                         rc = DISWriteReg8(pRegFrame, pDis->Param2.Base.idxGenReg,  (uint8_t )valpar1);    break;
2097                 case 2: rc = DISWriteReg16(pRegFrame, pDis->Param2.Base.idxGenReg, (uint16_t)valpar1);    break;
2098                 case 4: rc = DISWriteReg32(pRegFrame, pDis->Param2.Base.idxGenReg, (uint32_t)valpar1);    break;
2099                 case 8: rc = DISWriteReg64(pRegFrame, pDis->Param2.Base.idxGenReg, valpar1);              break;
2107                 rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam2, &valpar1, param2.size);
2145             uint64_t valpar1;
2155                 rc = emRamRead(pVM, pVCpu, pRegFrame,  &valpar1, pParam1, param1.size);
2170             eflags = pfnEmulate(&valpar1, param1.size);
2173             rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam1, &valpar1, param1.size);
2215             uint32_t valpar1;
2227             rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pStackVal, param1.size);
2248                 rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam1, &valpar1, param1.size);
2301             uint64_t valpar1, valpar2;
2321                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, param1.size);
2346             LogFlow(("emInterpretOrXorAnd %s %RGv %RX64 - %RX64 size %d (%d)\n", emGetMnemonic(pDis), pParam1, valpar1, valpar2, param2.size, param1.size));
2349             uint32_t eflags = pfnEmulate(&valpar1, valpar2, param2.size);
2351             LogFlow(("emInterpretOrXorAnd %s result %RX64\n", emGetMnemonic(pDis), valpar1));
2358             rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam1, &valpar1, param1.size);
2472             uint64_t valpar1, valpar2;
2492                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, param1.size);
2520             uint32_t eflags = pfnEmulate(&valpar1, valpar2, param2.size);
2527             rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam1, &valpar1, param1.size);
2576             uint64_t valpar1 = 0, valpar2;
2601             rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, 1);
2608             Log2(("emInterpretBtx: val=%x\n", valpar1));
2610             eflags = pfnEmulate(&valpar1, valpar2 & 0x7);
2612             Log2(("emInterpretBtx: val=%x CF=%d\n", valpar1, !!(eflags & X86_EFL_CF)));
2619             rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam1, &valpar1, 1);