Cross Reference: /vbox/include/VBox/vmm/cpum.h

Lines Matching refs:pVCpu
1015 VMMDECL(void)       CPUMGetGuestGDTR(PVMCPU pVCpu, PVBOXGDTR pGDTR);
1016 VMMDECL(RTGCPTR)    CPUMGetGuestIDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
1017 VMMDECL(RTSEL)      CPUMGetGuestTR(PVMCPU pVCpu, PCPUMSELREGHID pHidden);
1018 VMMDECL(RTSEL)      CPUMGetGuestLDTR(PVMCPU pVCpu);
1019 VMMDECL(RTSEL)      CPUMGetGuestLdtrEx(PVMCPU pVCpu, uint64_t *pGCPtrBase, uint32_t *pcbLimit);
1020 VMMDECL(uint64_t)   CPUMGetGuestCR0(PVMCPU pVCpu);
1021 VMMDECL(uint64_t)   CPUMGetGuestCR2(PVMCPU pVCpu);
1022 VMMDECL(uint64_t)   CPUMGetGuestCR3(PVMCPU pVCpu);
1023 VMMDECL(uint64_t)   CPUMGetGuestCR4(PVMCPU pVCpu);
1024 VMMDECL(uint64_t)   CPUMGetGuestCR8(PVMCPU pVCpu);
1025 VMMDECL(int)        CPUMGetGuestCRx(PVMCPU pVCpu, unsigned iReg, uint64_t *pValue);
1026 VMMDECL(uint32_t)   CPUMGetGuestEFlags(PVMCPU pVCpu);
1027 VMMDECL(uint32_t)   CPUMGetGuestEIP(PVMCPU pVCpu);
1028 VMMDECL(uint64_t)   CPUMGetGuestRIP(PVMCPU pVCpu);
1029 VMMDECL(uint32_t)   CPUMGetGuestEAX(PVMCPU pVCpu);
1030 VMMDECL(uint32_t)   CPUMGetGuestEBX(PVMCPU pVCpu);
1031 VMMDECL(uint32_t)   CPUMGetGuestECX(PVMCPU pVCpu);
1032 VMMDECL(uint32_t)   CPUMGetGuestEDX(PVMCPU pVCpu);
1033 VMMDECL(uint32_t)   CPUMGetGuestESI(PVMCPU pVCpu);
1034 VMMDECL(uint32_t)   CPUMGetGuestEDI(PVMCPU pVCpu);
1035 VMMDECL(uint32_t)   CPUMGetGuestESP(PVMCPU pVCpu);
1036 VMMDECL(uint32_t)   CPUMGetGuestEBP(PVMCPU pVCpu);
1037 VMMDECL(RTSEL)      CPUMGetGuestCS(PVMCPU pVCpu);
1038 VMMDECL(RTSEL)      CPUMGetGuestDS(PVMCPU pVCpu);
1039 VMMDECL(RTSEL)      CPUMGetGuestES(PVMCPU pVCpu);
1040 VMMDECL(RTSEL)      CPUMGetGuestFS(PVMCPU pVCpu);
1041 VMMDECL(RTSEL)      CPUMGetGuestGS(PVMCPU pVCpu);
1042 VMMDECL(RTSEL)      CPUMGetGuestSS(PVMCPU pVCpu);
1043 VMMDECL(uint64_t)   CPUMGetGuestDR0(PVMCPU pVCpu);
1044 VMMDECL(uint64_t)   CPUMGetGuestDR1(PVMCPU pVCpu);
1045 VMMDECL(uint64_t)   CPUMGetGuestDR2(PVMCPU pVCpu);
1046 VMMDECL(uint64_t)   CPUMGetGuestDR3(PVMCPU pVCpu);
1047 VMMDECL(uint64_t)   CPUMGetGuestDR6(PVMCPU pVCpu);
1048 VMMDECL(uint64_t)   CPUMGetGuestDR7(PVMCPU pVCpu);
1049 VMMDECL(int)        CPUMGetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t *pValue);
1050 VMMDECL(void)       CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t iLeaf, uint32_t iSubLeaf,
1052 VMMDECL(uint64_t)   CPUMGetGuestEFER(PVMCPU pVCpu);
1053 VMMDECL(VBOXSTRICTRC)   CPUMQueryGuestMsr(PVMCPU pVCpu, uint32_t idMsr, uint64_t *puValue);
1054 VMMDECL(VBOXSTRICTRC)   CPUMSetGuestMsr(PVMCPU pVCpu, uint32_t idMsr, uint64_t uValue);
1061 VMMDECL(int)        CPUMSetGuestGDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit);
1062 VMMDECL(int)        CPUMSetGuestIDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit);
1063 VMMDECL(int)        CPUMSetGuestTR(PVMCPU pVCpu, uint16_t tr);
1064 VMMDECL(int)        CPUMSetGuestLDTR(PVMCPU pVCpu, uint16_t ldtr);
1065 VMMDECL(int)        CPUMSetGuestCR0(PVMCPU pVCpu, uint64_t cr0);
1066 VMMDECL(int)        CPUMSetGuestCR2(PVMCPU pVCpu, uint64_t cr2);
1067 VMMDECL(int)        CPUMSetGuestCR3(PVMCPU pVCpu, uint64_t cr3);
1068 VMMDECL(int)        CPUMSetGuestCR4(PVMCPU pVCpu, uint64_t cr4);
1069 VMMDECL(int)        CPUMSetGuestDR0(PVMCPU pVCpu, uint64_t uDr0);
1070 VMMDECL(int)        CPUMSetGuestDR1(PVMCPU pVCpu, uint64_t uDr1);
1071 VMMDECL(int)        CPUMSetGuestDR2(PVMCPU pVCpu, uint64_t uDr2);
1072 VMMDECL(int)        CPUMSetGuestDR3(PVMCPU pVCpu, uint64_t uDr3);
1073 VMMDECL(int)        CPUMSetGuestDR6(PVMCPU pVCpu, uint64_t uDr6);
1074 VMMDECL(int)        CPUMSetGuestDR7(PVMCPU pVCpu, uint64_t uDr7);
1075 VMMDECL(int)        CPUMSetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t Value);
1076 VMM_INT_DECL(int)   CPUMSetGuestXcr0(PVMCPU pVCpu, uint64_t uNewValue);
1077 VMMDECL(int)        CPUMSetGuestEFlags(PVMCPU pVCpu, uint32_t eflags);
1078 VMMDECL(int)        CPUMSetGuestEIP(PVMCPU pVCpu, uint32_t eip);
1079 VMMDECL(int)        CPUMSetGuestEAX(PVMCPU pVCpu, uint32_t eax);
1080 VMMDECL(int)        CPUMSetGuestEBX(PVMCPU pVCpu, uint32_t ebx);
1081 VMMDECL(int)        CPUMSetGuestECX(PVMCPU pVCpu, uint32_t ecx);
1082 VMMDECL(int)        CPUMSetGuestEDX(PVMCPU pVCpu, uint32_t edx);
1083 VMMDECL(int)        CPUMSetGuestESI(PVMCPU pVCpu, uint32_t esi);
1084 VMMDECL(int)        CPUMSetGuestEDI(PVMCPU pVCpu, uint32_t edi);
1085 VMMDECL(int)        CPUMSetGuestESP(PVMCPU pVCpu, uint32_t esp);
1086 VMMDECL(int)        CPUMSetGuestEBP(PVMCPU pVCpu, uint32_t ebp);
1087 VMMDECL(int)        CPUMSetGuestCS(PVMCPU pVCpu, uint16_t cs);
1088 VMMDECL(int)        CPUMSetGuestDS(PVMCPU pVCpu, uint16_t ds);
1089 VMMDECL(int)        CPUMSetGuestES(PVMCPU pVCpu, uint16_t es);
1090 VMMDECL(int)        CPUMSetGuestFS(PVMCPU pVCpu, uint16_t fs);
1091 VMMDECL(int)        CPUMSetGuestGS(PVMCPU pVCpu, uint16_t gs);
1092 VMMDECL(int)        CPUMSetGuestSS(PVMCPU pVCpu, uint16_t ss);
1093 VMMDECL(void)       CPUMSetGuestEFER(PVMCPU pVCpu, uint64_t val);
1097 VMMDECL(void)       CPUMSetGuestCtx(PVMCPU pVCpu, const PCPUMCTX pCtx);
1098 VMM_INT_DECL(void)  CPUMGuestLazyLoadHiddenCsAndSs(PVMCPU pVCpu);
1099 VMM_INT_DECL(void)  CPUMGuestLazyLoadHiddenSelectorReg(PVMCPU pVCpu, PCPUMSELREG pSReg);
1100 VMMR0_INT_DECL(void)        CPUMR0SetGuestTscAux(PVMCPU pVCpu, uint64_t uValue);
1101 VMMR0_INT_DECL(uint64_t)    CPUMR0GetGuestTscAux(PVMCPU pVCpu);
1108 VMMDECL(bool)       CPUMIsGuestIn16BitCode(PVMCPU pVCpu);
1109 VMMDECL(bool)       CPUMIsGuestIn32BitCode(PVMCPU pVCpu);
1110 VMMDECL(bool)       CPUMIsGuestIn64BitCode(PVMCPU pVCpu);
1111 VMMDECL(bool)       CPUMIsGuestNXEnabled(PVMCPU pVCpu);
1112 VMMDECL(bool)       CPUMIsGuestPageSizeExtEnabled(PVMCPU pVCpu);
1113 VMMDECL(bool)       CPUMIsGuestPagingEnabled(PVMCPU pVCpu);
1114 VMMDECL(bool)       CPUMIsGuestR0WriteProtEnabled(PVMCPU pVCpu);
1115 VMMDECL(bool)       CPUMIsGuestInRealMode(PVMCPU pVCpu);
1116 VMMDECL(bool)       CPUMIsGuestInRealOrV86Mode(PVMCPU pVCpu);
1117 VMMDECL(bool)       CPUMIsGuestInProtectedMode(PVMCPU pVCpu);
1118 VMMDECL(bool)       CPUMIsGuestInPagedProtectedMode(PVMCPU pVCpu);
1119 VMMDECL(bool)       CPUMIsGuestInLongMode(PVMCPU pVCpu);
1120 VMMDECL(bool)       CPUMIsGuestInPAEMode(PVMCPU pVCpu);
1121 VMM_INT_DECL(bool)  CPUMIsGuestInRawMode(PVMCPU pVCpu);
1187  * @param   pVCpu   The current virtual CPU.
1232 VMMDECL(RTSEL)          CPUMGetHyperCS(PVMCPU pVCpu);
1233 VMMDECL(RTSEL)          CPUMGetHyperDS(PVMCPU pVCpu);
1234 VMMDECL(RTSEL)          CPUMGetHyperES(PVMCPU pVCpu);
1235 VMMDECL(RTSEL)          CPUMGetHyperFS(PVMCPU pVCpu);
1236 VMMDECL(RTSEL)          CPUMGetHyperGS(PVMCPU pVCpu);
1237 VMMDECL(RTSEL)          CPUMGetHyperSS(PVMCPU pVCpu);
1239 VMMDECL(uint32_t)       CPUMGetHyperCR0(PVMCPU pVCpu);
1240 VMMDECL(uint32_t)       CPUMGetHyperCR2(PVMCPU pVCpu);
1241 VMMDECL(uint32_t)       CPUMGetHyperCR3(PVMCPU pVCpu);
1242 VMMDECL(uint32_t)       CPUMGetHyperCR4(PVMCPU pVCpu);
1245 VMMDECL(uint32_t)       CPUMGetHyperEAX(PVMCPU pVCpu);
1246 VMMDECL(uint32_t)       CPUMGetHyperEBX(PVMCPU pVCpu);
1248 VMMDECL(uint32_t)       CPUMGetHyperECX(PVMCPU pVCpu);
1250 VMMDECL(uint32_t)       CPUMGetHyperEDX(PVMCPU pVCpu);
1251 VMMDECL(uint32_t)       CPUMGetHyperESI(PVMCPU pVCpu);
1252 VMMDECL(uint32_t)       CPUMGetHyperEDI(PVMCPU pVCpu);
1253 VMMDECL(uint32_t)       CPUMGetHyperEBP(PVMCPU pVCpu);
1254 VMMDECL(uint32_t)       CPUMGetHyperESP(PVMCPU pVCpu);
1255 VMMDECL(uint32_t)       CPUMGetHyperEFlags(PVMCPU pVCpu);
1256 VMMDECL(uint32_t)       CPUMGetHyperEIP(PVMCPU pVCpu);
1257 VMMDECL(uint64_t)       CPUMGetHyperRIP(PVMCPU pVCpu);
1258 VMMDECL(uint32_t)       CPUMGetHyperIDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
1259 VMMDECL(uint32_t)       CPUMGetHyperGDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
1260 VMMDECL(RTSEL)          CPUMGetHyperLDTR(PVMCPU pVCpu);
1261 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR0(PVMCPU pVCpu);
1262 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR1(PVMCPU pVCpu);
1263 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR2(PVMCPU pVCpu);
1264 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR3(PVMCPU pVCpu);
1265 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR6(PVMCPU pVCpu);
1266 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR7(PVMCPU pVCpu);
1267 VMMDECL(void)           CPUMGetHyperCtx(PVMCPU pVCpu, PCPUMCTX pCtx);
1268 VMMDECL(uint32_t)       CPUMGetHyperCR3(PVMCPU pVCpu);
1273 VMMDECL(void)           CPUMSetHyperGDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
1274 VMMDECL(void)           CPUMSetHyperLDTR(PVMCPU pVCpu, RTSEL SelLDTR);
1275 VMMDECL(void)           CPUMSetHyperIDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
1276 VMMDECL(void)           CPUMSetHyperCR3(PVMCPU pVCpu, uint32_t cr3);
1277 VMMDECL(void)           CPUMSetHyperTR(PVMCPU pVCpu, RTSEL SelTR);
1278 VMMDECL(void)           CPUMSetHyperCS(PVMCPU pVCpu, RTSEL SelCS);
1279 VMMDECL(void)           CPUMSetHyperDS(PVMCPU pVCpu, RTSEL SelDS);
1280 VMMDECL(void)           CPUMSetHyperES(PVMCPU pVCpu, RTSEL SelDS);
1281 VMMDECL(void)           CPUMSetHyperFS(PVMCPU pVCpu, RTSEL SelDS);
1282 VMMDECL(void)           CPUMSetHyperGS(PVMCPU pVCpu, RTSEL SelDS);
1283 VMMDECL(void)           CPUMSetHyperSS(PVMCPU pVCpu, RTSEL SelSS);
1284 VMMDECL(void)           CPUMSetHyperESP(PVMCPU pVCpu, uint32_t u32ESP);
1285 VMMDECL(int)            CPUMSetHyperEFlags(PVMCPU pVCpu, uint32_t Efl);
1286 VMMDECL(void)           CPUMSetHyperEIP(PVMCPU pVCpu, uint32_t u32EIP);
1287 VMM_INT_DECL(void)      CPUMSetHyperState(PVMCPU pVCpu, uint32_t u32EIP, uint32_t u32ESP, uint32_t u32EAX, uint32_t u32EDX);
1288 VMMDECL(void)           CPUMSetHyperDR0(PVMCPU pVCpu, RTGCUINTREG uDr0);
1289 VMMDECL(void)           CPUMSetHyperDR1(PVMCPU pVCpu, RTGCUINTREG uDr1);
1290 VMMDECL(void)           CPUMSetHyperDR2(PVMCPU pVCpu, RTGCUINTREG uDr2);
1291 VMMDECL(void)           CPUMSetHyperDR3(PVMCPU pVCpu, RTGCUINTREG uDr3);
1292 VMMDECL(void)           CPUMSetHyperDR6(PVMCPU pVCpu, RTGCUINTREG uDr6);
1293 VMMDECL(void)           CPUMSetHyperDR7(PVMCPU pVCpu, RTGCUINTREG uDr7);
1294 VMMDECL(void)           CPUMSetHyperCtx(PVMCPU pVCpu, const PCPUMCTX pCtx);
1295 VMMDECL(int)            CPUMRecalcHyperDRx(PVMCPU pVCpu, uint8_t iGstReg, bool fForceHyper);
1298 VMMDECL(void)           CPUMPushHyper(PVMCPU pVCpu, uint32_t u32);
1299 VMMDECL(int)            CPUMQueryHyperCtxPtr(PVMCPU pVCpu, PCPUMCTX *ppCtx);
1300 VMMDECL(PCPUMCTX)       CPUMGetHyperCtxPtr(PVMCPU pVCpu);
1301 VMMDECL(PCCPUMCTXCORE)  CPUMGetHyperCtxCore(PVMCPU pVCpu);
1302 VMMDECL(PCPUMCTX)       CPUMQueryGuestCtxPtr(PVMCPU pVCpu);
1303 VMMDECL(PCCPUMCTXCORE)  CPUMGetGuestCtxCore(PVMCPU pVCpu);
1304 VMM_INT_DECL(int)       CPUMRawEnter(PVMCPU pVCpu);
1305 VMM_INT_DECL(int)       CPUMRawLeave(PVMCPU pVCpu, int rc);
1306 VMMDECL(uint32_t)       CPUMRawGetEFlags(PVMCPU pVCpu);
1307 VMMDECL(void)           CPUMRawSetEFlags(PVMCPU pVCpu, uint32_t fEfl);
1341 VMMDECL(void)           CPUMSetChangedFlags(PVMCPU pVCpu, uint32_t fChangedFlags);
1342 VMMR3DECL(uint32_t)     CPUMR3RemEnter(PVMCPU pVCpu, uint32_t *puCpl);
1343 VMMR3DECL(void)         CPUMR3RemLeave(PVMCPU pVCpu, bool fNoOutOfSyncSels);
1347 VMMDECL(bool)           CPUMIsGuestFPUStateActive(PVMCPU pVCpu);
1348 VMMDECL(bool)           CPUMIsGuestDebugStateActive(PVMCPU pVCpu);
1349 VMMDECL(bool)           CPUMIsGuestDebugStateActivePending(PVMCPU pVCpu);
1350 VMMDECL(void)           CPUMDeactivateGuestDebugState(PVMCPU pVCpu);
1351 VMMDECL(bool)           CPUMIsHyperDebugStateActive(PVMCPU pVCpu);
1352 VMMDECL(bool)           CPUMIsHyperDebugStateActivePending(PVMCPU pVCpu);
1353 VMMDECL(uint32_t)       CPUMGetGuestCPL(PVMCPU pVCpu);
1354 VMMDECL(CPUMMODE)       CPUMGetGuestMode(PVMCPU pVCpu);
1355 VMMDECL(uint32_t)       CPUMGetGuestCodeBits(PVMCPU pVCpu);
1356 VMMDECL(DISCPUMODE)     CPUMGetGuestDisMode(PVMCPU pVCpu);
1385 VMMR3DECL(void)         CPUMR3ResetCpu(PVM pVM, PVMCPU pVCpu);
1449 VMMDECL(int)            CPUMHandleLazyFPU(PVMCPU pVCpu);
1450 VMMDECL(uint32_t)       CPUMRCGetGuestCPL(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
1452 VMMDECL(void)           CPUMRCRecheckRawState(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
1465 VMMR0_INT_DECL(int)     CPUMR0Trap07Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
1466 VMMR0_INT_DECL(int)     CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
1467 VMMR0_INT_DECL(int)     CPUMR0SaveGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
1468 VMMR0_INT_DECL(int)     CPUMR0SaveHostDebugState(PVM pVM, PVMCPU pVCpu);
1469 VMMR0_INT_DECL(bool)    CPUMR0DebugStateMaybeSaveGuestAndRestoreHost(PVMCPU pVCpu, bool fDr6);
1470 VMMR0_INT_DECL(bool)    CPUMR0DebugStateMaybeSaveGuest(PVMCPU pVCpu, bool fDr6);
1472 VMMR0_INT_DECL(void)    CPUMR0LoadGuestDebugState(PVMCPU pVCpu, bool fDr6);
1473 VMMR0_INT_DECL(void)    CPUMR0LoadHyperDebugState(PVMCPU pVCpu, bool fDr6);
1475 VMMR0_INT_DECL(void)    CPUMR0SetLApic(PVMCPU pVCpu, uint32_t iHostCpuSet);