Lines Matching refs:I915_WRITE

158 	I915_WRITE(VIDEO_DIP_CTL, val);
162 I915_WRITE(VIDEO_DIP_DATA, *data);
167 I915_WRITE(VIDEO_DIP_DATA, 0);
174 I915_WRITE(VIDEO_DIP_CTL, val);
198 I915_WRITE(reg, val);
202 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
207 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
214 I915_WRITE(reg, val);
241 I915_WRITE(reg, val);
245 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
250 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
257 I915_WRITE(reg, val);
281 I915_WRITE(reg, val);
285 I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
290 I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
297 I915_WRITE(reg, val);
318 I915_WRITE(ctl_reg, val);
322 I915_WRITE(data_reg + i, *data);
327 I915_WRITE(data_reg + i, 0);
331 I915_WRITE(ctl_reg, val);
412 I915_WRITE(reg, val);
432 I915_WRITE(reg, val);
442 I915_WRITE(reg, val);
469 I915_WRITE(reg, val);
492 I915_WRITE(reg, val);
503 I915_WRITE(reg, val);
528 I915_WRITE(reg, val);
538 I915_WRITE(reg, val);
563 I915_WRITE(reg, val);
572 I915_WRITE(reg, val);
591 I915_WRITE(reg, 0);
599 I915_WRITE(reg, val);
647 I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);
719 I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE);
725 I915_WRITE(intel_hdmi->hdmi_reg, temp);
732 I915_WRITE(intel_hdmi->hdmi_reg, temp);
763 I915_WRITE(intel_hdmi->hdmi_reg, temp);
767 I915_WRITE(intel_hdmi->hdmi_reg, temp);
783 I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE);
789 I915_WRITE(intel_hdmi->hdmi_reg, temp);
796 I915_WRITE(intel_hdmi->hdmi_reg, temp);
1226 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);