Lines Matching defs:ret_val
1111 int32_t ret_val;
1202 ret_val = e1000_setup_link(hw);
1220 return ret_val;
1232 int32_t ret_val;
1247 if ((ret_val = e1000_read_eeprom(hw, EEPROM_SERDES_AMPLITUDE, 1,
1249 return ret_val;
1255 if((ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL,
1257 return ret_val;
1278 int32_t ret_val;
1341 ret_val = (hw->media_type == e1000_media_type_copper) ?
1344 if (ret_val < 0) {
1345 return ret_val;
1390 return ret_val;
1410 int32_t ret_val;
1424 if((ret_val = e1000_adjust_serdes_amplitude(hw)))
1425 return ret_val;
1432 if((ret_val = e1000_set_vco_speed(hw)))
1433 return ret_val;
1520 if((ret_val = e1000_check_for_link(hw))) {
1522 return ret_val;
1544 int32_t ret_val;
1566 if((ret_val = e1000_detect_gig_phy(hw))) {
1568 return ret_val;
1584 if((ret_val = e1000_phy_reset(hw))) {
1586 return ret_val;
1594 if((ret_val = e1000_set_d3_lplu_state(hw, FALSE))) {
1596 return ret_val;
1600 if((ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL,
1602 return ret_val;
1628 if((ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL,
1630 return ret_val;
1647 if((ret_val = e1000_read_phy_reg(hw,
1650 return ret_val;
1652 if((ret_val = e1000_write_phy_reg(hw,
1655 return ret_val;
1657 if((ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL,
1659 return ret_val;
1661 if((ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1663 return ret_val;
1666 if((ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL,
1668 return ret_val;
1693 if((ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1695 return ret_val;
1698 if((ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL,
1700 return ret_val;
1740 if((ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL,
1742 return ret_val;
1747 if((ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1749 return ret_val;
1761 if((ret_val = e1000_write_phy_reg(hw,
1764 return ret_val;
1768 if((ret_val = e1000_phy_reset(hw))) {
1770 return ret_val;
1803 if((ret_val = e1000_phy_setup_autoneg(hw))) {
1805 return ret_val;
1812 if((ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data)))
1813 return ret_val;
1816 if((ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data)))
1817 return ret_val;
1824 if((ret_val = e1000_wait_autoneg(hw))) {
1826 return ret_val;
1833 if((ret_val = e1000_wait_autoneg(hw))) {
1835 return ret_val;
1844 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data)))
1845 return ret_val;
1846 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data)))
1847 return ret_val;
1861 if((ret_val = e1000_config_mac_to_phy(hw))) {
1863 return ret_val;
1866 if((ret_val = e1000_config_fc_after_link_up(hw))) {
1868 return ret_val;
1872 if((ret_val = e1000_config_dsp_after_link_change(hw, TRUE))) {
1874 return ret_val;
1896 int32_t ret_val;
1903 if((ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV,
1905 return ret_val;
1908 if((ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg)))
1909 return ret_val;
2015 if((ret_val = e1000_write_phy_reg(hw, PHY_AUTONEG_ADV,
2017 return ret_val;
2021 if((ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg)))
2022 return ret_val;
2062 int32_t ret_val;
2078 if((ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS,
2080 return ret_val;
2097 if((ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
2099 return ret_val;
2200 int32_t ret_val;
2215 if((ret_val = e1000_force_mac_fc(hw))) {
2217 return ret_val;
2231 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg)))
2232 return ret_val;
2233 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg)))
2234 return ret_val;
2243 if((ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV,
2245 return ret_val;
2246 if((ret_val = e1000_read_phy_reg(hw, PHY_LP_ABILITY,
2248 return ret_val;
2381 if((ret_val = e1000_force_mac_fc(hw))) {
2383 return ret_val;
2407 int32_t ret_val;
2440 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data)))
2441 return ret_val;
2442 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data)))
2443 return ret_val;
2465 if((ret_val = e1000_config_mac_to_phy(hw))) {
2467 return ret_val;
2475 if((ret_val = e1000_config_fc_after_link_up(hw))) {
2477 return ret_val;
2490 if((ret_val = e1000_read_phy_reg(hw, PHY_LP_ABILITY,
2492 return ret_val;
2550 if((ret_val = e1000_config_fc_after_link_up(hw))) {
2552 return ret_val;
2641 int32_t ret_val;
2653 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data)))
2654 return ret_val;
2655 if((ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data)))
2656 return ret_val;
2817 uint32_t ret_val;
2823 if((ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2825 return ret_val;
2828 ret_val = e1000_read_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT & reg_addr,
2831 return ret_val;
2920 uint32_t ret_val;
2926 if((ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2928 return ret_val;
2931 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT & reg_addr,
2934 return ret_val;
3051 int32_t ret_val;
3057 if((ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data)))
3058 return ret_val;
3061 if((ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data)))
3062 return ret_val;
3081 int32_t phy_init_status, ret_val;
3088 if((ret_val = e1000_read_phy_reg(hw, PHY_ID1, &phy_id_high)))
3089 return ret_val;
3093 if((ret_val = e1000_read_phy_reg(hw, PHY_ID2, &phy_id_low)))
3094 return ret_val;
3556 int ret_val, i;
3620 ret_val = e1000_reset(&hw);
3621 if (ret_val < 0) {
3622 if ((ret_val == -E1000_ERR_NOLINK) ||
3623 (ret_val == -E1000_ERR_TIMEOUT)) {