Lines Matching defs:on
1103 // optimizations for second input operand of arithmehtic operations on Intel
1104 // this operand is allowed to be on the stack in some cases
1335 assert(number >= LIR_OprDesc::vreg_base, "fixed intervals must not be live on block bounds");
1833 // the interval is split to get a short range that is located on the stack
1838 // * the interval would be on the fpu stack at the begin of the exception handler
1839 // this is not allowed because of the complicated fpu stack handling on Intel
1930 // optimization to reduce number of moves: when to_interval is on stack and
2143 assert(interval->assigned_regHi() == any_reg, "must not have hi register (double fpu values are stored in one register on Intel)");
2194 // new semantic for is_last_use: not only set on definite end of interval,
2416 assert(interval->assigned_reg() < LinearScan::nof_regs, "interval is on stack, so stack slot is registered twice");
2661 // Does this reverse on x86 vs. sparc?
2768 // (If, on some machine, the interpreter's Java locals or stack
3079 allocate_fpu_stack(); // Only has effect on Intel
3194 tty->print_cr("Interval %d is on position %d in list", i1->reg_num(), i); i1->print(); tty->cr();
5151 assert(allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 1), "split pos must be odd when not on block boundary");
5152 assert(!allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 0), "split pos must be even on block boundary");
5170 2) the right part is always on the stack and therefore ignored in further processing
5227 assert(allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 1), "split pos must be odd when not on block boundary");
5228 assert(!allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 0), "split pos must be even on block boundary");
5620 // Note: this does not work if callee-saved registers are available (e.g. on Sparc)