Lines Matching refs:stack
216 // fixed intervals not needed for FPU stack allocation
228 // compute next unused stack index that can be used for spilling
255 // oop location. So a stack slot bigger than 2^11 leads to an overflow
260 bailout("too many stack slots used");
322 // eliminate moves from register to stack if stack slot is known to be correct
444 // remove move from register to stack if the stack slot is guaranteed to be correct.
454 // move target is a stack slot that is always correct, so eliminate instruction
460 // insert move from register to stack just after the beginning of the interval
474 assert(to_opr->is_stack(), "to operand must be a stack slot");
477 TRACE_LINEAR_SCAN(4, tty->print_cr("inserting move after definition of interval %d to stack slot %d at op_id %d", interval->reg_num(), interval->canonical_spill_slot() - LinearScan::nof_regs, op_id));
657 ValueStack* stack = info->stack();
658 for_each_state_value(stack, value,
1042 // This interval will always get a stack slot first, so return noUse.
1061 // result is a stack-slot, so prevent immediate reloading
1078 // To avoid moves from stack to stack (not allowed) force the input operand to a register
1089 // The input operand is not forced to a register (moves from stack to register are allowed),
1098 // conditional moves can handle stack operands
1104 // this operand is allowed to be on the stack in some cases
1119 assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register");
1125 // FPU stack float instruction
1135 assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register");
1155 assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register");
1169 // special handling for method arguments (moves from stack to virtual register):
1170 // the interval gets no register assigned, but the stack slot.
1190 assert(block_of_op_with_id(move->id())->number_of_preds() == 0, "move from stack must be in first block");
1193 TRACE_LINEAR_SCAN(4, tty->print_cr("found move from stack slot %d to vreg %d", o->is_single_stack() ? o->single_stack_ix() : o->double_stack_ix(), reg_num(move->result_opr())));
1404 ValueStack* stack = info->stack();
1405 for_each_state_value(stack, value,
1833 // the interval is split to get a short range that is located on the stack
1838 // * the interval would be on the fpu stack at the begin of the exception handler
1839 // this is not allowed because of the complicated fpu stack handling on Intel
1930 // optimization to reduce number of moves: when to_interval is on stack and
1931 // the stack slot is known to be always correct, then no move is necessary
2051 // stack slot
2053 return LIR_OprFact::stack(assigned_reg - nof_regs, type);
2160 return LIR_OprFact::stack(interval->canonical_spill_slot() - nof_regs, interval->type());
2198 // information is only needed for fpu stack allocation
2320 if (info->stack()->bci() != SynchronizationEntryBCI && !info->scope()->method()->is_native()) {
2321 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
2339 assert(stack_end >= -Bytecodes::depth(code), "must have non-empty expression stack at if bytecode");
2409 // Spill optimization: when the stack value is guaranteed to be always correct,
2416 assert(interval->assigned_reg() < LinearScan::nof_regs, "interval is on stack, so stack slot is registered twice");
2423 // add oops from lock stack
2424 assert(info->stack() != NULL, "CodeEmitInfo must always have a stack");
2425 int locks_count = info->stack()->total_locks_size();
2446 if (info->stack()->locks_size() != first_info->stack()->locks_size()) {
2479 // (cpu registers and stack slots)
2615 // the exact location of fpu stack values is only known
2616 // during fpu stack allocation, so the stack allocator object
2618 assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
2714 // fpu_regnrLo is a FPU stack slot whose VMReg represents
2720 // the exact location of fpu stack values is only known
2721 // during fpu stack allocation, so the stack allocator object
2723 assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
2766 // This is actually reasonable, since locals and stack arrays
2768 // (If, on some machine, the interpreter's Java locals or stack
2875 // describe expression stack
2887 assert(expressions->length() == cur_state->stack_size(), "wrong number of stack entries");
2908 ValueStack* innermost_state = info->stack();
2972 // compute debug information if fpu stack allocation is not needed.
2973 // when fpu stack allocation is needed, the debug information can not
2975 // -> debug information is created inside the fpu stack allocator
3080 NOT_PRODUCT(print_lir(2, "LIR after FPU stack allocation:"));
3601 // When an operand is marked with is_last_use, then the fpu stack allocator
3602 // removes the register from the fpu stack -> the register contains no value
3758 assert(!used_regs.at(it->assigned_reg()) || it->assigned_reg() == _mapping_from.at(i)->assigned_reg(), "stack slots used in _mapping_from must be disjoint to _mapping_to");
3844 // the last_use flag is an optimization for FPU stack allocation. When the same
3914 // create a new spill interval and assign a stack slot to it
3925 // one stack slot to another can happen (not allowed by LIR_Assembler
3936 // insert a move from register to stack and update the mapping
4380 // All split children are spilled to the same stack slot (stored in _canonical_spill_slot)
4825 assert(reg < LinearScan::nof_regs, "interval must have a register assigned (stack slots not allowed)");
5170 2) the right part is always on the stack and therefore ignored in further processing
5272 // so in the best case no stack slot is necessary
5286 assert(it->next_usage(mustHaveRegister, current_pos) == max_jint, "the remaining part is spilled to stack and therefore has no register");
5687 // combining the stack slots for intervals where spill move optimization is applied
5722 // modify intervals such that cur gets the same stack slot as register_hint
5739 // activating an interval that has a stack slot assigned -> split it at first use position
5747 // activating an interval that must start in a stack slot, but may get a register later
5748 // used for lir_roundfp: rounding is done by store to stack and reload later
5749 TRACE_LINEAR_SCAN(4, tty->print_cr(" interval must start in stack slot -> split it before first use"));
5777 // load spilled values that become active from stack slot to register
5875 // equal FPU stack operations can be optimized
5880 // equal FPU stack operations can be optimized
6381 case counter_fpu_stack: return "fpu-stack";
6388 case counter_move_reg_stack: return "register->stack";
6389 case counter_move_stack_reg: return "stack->register";
6390 case counter_move_stack_stack:return "stack->stack";