Lines Matching refs:move
321 // ********** spill move optimization
364 // at the definition of the interval -> move write to memory out of loop
444 // remove move from register to stack if the stack slot is guaranteed to be correct.
447 assert(op->as_Op1() != NULL, "move must be LIR_Op1");
454 // move target is a stack slot that is always correct, so eliminate instruction
455 TRACE_LINEAR_SCAN(4, tty->print_cr("eliminating move from interval %d to %d", op1->in_opr()->vreg_number(), op1->result_opr()->vreg_number()));
460 // insert move from register to stack just after the beginning of the interval
476 insertion_buffer.move(j, from_opr, to_opr);
477 TRACE_LINEAR_SCAN(4, tty->print_cr("inserting move after definition of interval %d to stack slot %d at op_id %d", interval->reg_num(), interval->canonical_spill_slot() - LinearScan::nof_regs, op_id));
994 // TODO: move this directly to position where use-kind is computed
1036 LIR_Op1* move = (LIR_Op1*)op;
1037 LIR_Opr res = move->result_opr();
1045 } else if (move->in_opr()->is_stack()) {
1049 } else if (move->in_opr()->is_register() && move->result_opr()->is_register()) {
1072 LIR_Op1* move = (LIR_Op1*)op;
1073 LIR_Opr res = move->result_opr();
1081 } else if (move->in_opr()->is_register() && move->result_opr()->is_register()) {
1175 LIR_Op1* move = (LIR_Op1*)op;
1177 if (move->in_opr()->is_stack()) {
1180 LIR_Opr o = move->in_opr();
1189 assert(move->id() > 0, "invalid id");
1190 assert(block_of_op_with_id(move->id())->number_of_preds() == 0, "move from stack must be in first block");
1191 assert(move->result_opr()->is_virtual(), "result of move must be a virtual register");
1193 TRACE_LINEAR_SCAN(4, tty->print_cr("found move from stack slot %d to vreg %d", o->is_single_stack() ? o->single_stack_ix() : o->double_stack_ix(), reg_num(move->result_opr())));
1196 Interval* interval = interval_at(reg_num(move->result_opr()));
1198 int stack_slot = LinearScan::nof_regs + (move->in_opr()->is_single_stack() ? move->in_opr()->single_stack_ix() : move->in_opr()->double_stack_ix());
1206 // special handling for doubleword move from memory to register:
1211 LIR_Op1* move = (LIR_Op1*)op;
1213 if (move->result_opr()->is_double_cpu() && move->in_opr()->is_pointer()) {
1214 LIR_Address* address = move->in_opr()->as_address_ptr();
1232 LIR_Op1* move = (LIR_Op1*)op;
1234 LIR_Opr move_from = move->in_opr();
1235 LIR_Opr move_to = move->result_opr();
1242 TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", move->id(), from->reg_num(), to->reg_num()));
1712 // need to insert move instruction
1912 // multiple mappings, so notify move-resolver that this is allowed
1931 // the stack slot is known to be always correct, then no move is necessary
2090 "register numbers must be sorted (ensure that e.g. a move from eax,ebx to ebx,eax can not occur)");
2380 assert(!is_call_site, "move must not be a call site");
2381 assert(op->as_Op1() != NULL, "move must be LIR_Op1");
2382 LIR_Op1* move = (LIR_Op1*)op;
2384 is_patch_info = move->patch_code() != lir_patch_none;
2990 assert(op->as_Op1() != NULL, "move must be LIR_Op1");
2991 LIR_Op1* move = (LIR_Op1*)op;
2992 LIR_Opr src = move->in_opr();
2993 LIR_Opr dst = move->result_opr();
3283 LIR_Op1* move = (LIR_Op1*)op;
3284 check_live = (move->patch_code() == lir_patch_none);
3836 assert(from_interval->type() == to_interval->type(), "move between different types");
3845 // input interval is used in more than one move, then it is too difficult to determine
3846 // if this move is really the last use.
3849 _insertion_buffer.move(_insert_idx, from_opr, to_opr);
3851 TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: inserted move from register %d (%d, %d) to %d (%d, %d)", from_interval->reg_num(), from_interval->assigned_reg(), from_interval->assigned_regHi(), to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi()));
3855 assert(from_opr->type() == to_interval->type(), "move between different types");
3860 _insertion_buffer.move(_insert_idx, from_opr, to_opr);
3862 TRACE_LINEAR_SCAN(4, tty->print("MoveResolver: inserted move from constant "); from_opr->print(); tty->print_cr(" to %d (%d, %d)", to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi()));
3870 // Block all registers that are used as input operands of a move.
3871 // When a register is blocked, no move to this register is emitted.
3910 // no move could be processed because there is a cycle in the move list
3936 // insert a move from register to stack and update the mapping
4685 // also handle move from inactive list to active list
4692 // move to handled state (not maintained as a list)
4974 // output all moves here. When source and target are equal, the move is
4979 assert(op_id > 0 && allocator()->block_of_op_with_id(op_id - 2) == op_block, "cannot insert move at block boundary");
5028 assert(optimal_split_pos > allocator()->max_lir_op_id() || allocator()->is_block_begin(optimal_split_pos), "algorithm must move split pos to block boundary");
5059 TRACE_LINEAR_SCAN(4, tty->print_cr(" cannot move split pos to block boundary because min_pos and max_pos are in same block"));
5063 // Do not move split position if the interval has a hole before max_split_pos.
5083 // if it is not the end marker for the same loop as the min-position, then move
5089 TRACE_LINEAR_SCAN(4, tty->print_cr(" interval is used in loop that ends in block B%d, so trying to move max_block back from B%d to B%d", loop_block->block_id(), max_block->block_id(), loop_block->block_id()));
5146 // move position before actual instruction (odd op_id)
5222 // move position before actual instruction (odd op_id)
5236 TRACE_LINEAR_SCAN(4, tty->print_cr(" inserting move from interval %d to %d", it->reg_num(), spilled_part->reg_num()));
5426 // sort register numbers to prevent e.g. a move from eax,ebx to ebx,eax
5578 // sort register numbers to prevent e.g. a move from eax,ebx to ebx,eax
5664 assert(op->as_Op1() != NULL, "move must be LIR_Op1");
5681 // cur is not the target of a move, otherwise register_hint would be set
5687 // combining the stack slots for intervals where spill move optimization is applied
5713 assert(cur->first_usage(mustHaveRegister) == begin_pos, "must have use position at begin of interval because of move");
5714 assert(end_hint->first_usage(mustHaveRegister) == end_pos, "must have use position at begin of interval because of move");
5771 // spilled intervals need not be move to active-list
5781 assert(cur->current_split_child()->reg_num() != cur->reg_num(), "cannot insert move between same interval");
5782 TRACE_LINEAR_SCAN(4, tty->print_cr("Inserting move from interval %d to %d because insert_move_when_activated is set", cur->current_split_child()->reg_num(), cur->reg_num()));
5860 assert(op1->as_Op1() != NULL, "move must be LIR_Op1");
5861 assert(op2->as_Op1() != NULL, "move must be LIR_Op1");