Lines Matching defs:LIR_OprDesc
46 // LIR_OprDesc
51 class LIR_OprDesc;
58 typedef LIR_OprDesc* LIR_Opr;
73 // define LIR_OprPtr early so LIR_OprDesc can refer to it
182 // The class LIR_OprDesc represents a LIR instruction operand;
189 class LIR_OprDesc: public CompilationResourceObj {
458 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
460 case T_INT: return LIR_OprDesc::int_type;
461 case T_LONG: return LIR_OprDesc::long_type;
462 case T_FLOAT: return LIR_OprDesc::float_type;
463 case T_DOUBLE: return LIR_OprDesc::double_type;
465 case T_ARRAY: return LIR_OprDesc::object_type;
466 case T_ADDRESS: return LIR_OprDesc::address_type;
468 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
472 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
474 case LIR_OprDesc::int_type: return T_INT;
475 case LIR_OprDesc::long_type: return T_LONG;
476 case LIR_OprDesc::float_type: return T_FLOAT;
477 case LIR_OprDesc::double_type: return T_DOUBLE;
478 case LIR_OprDesc::object_type: return T_OBJECT;
479 case LIR_OprDesc::address_type: return T_ADDRESS;
480 case LIR_OprDesc::unknown_type: // fall through
518 , _index(LIR_OprDesc::illegalOpr())
525 , _index(LIR_OprDesc::illegalOpr())
563 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
564 LIR_OprDesc::int_type |
565 LIR_OprDesc::cpu_register |
566 LIR_OprDesc::single_size);
569 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
570 LIR_OprDesc::object_type |
571 LIR_OprDesc::cpu_register |
572 LIR_OprDesc::single_size);
575 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
576 LIR_OprDesc::address_type |
577 LIR_OprDesc::cpu_register |
578 LIR_OprDesc::single_size);
582 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
583 (reg2 << LIR_OprDesc::reg2_shift) |
584 LIR_OprDesc::long_type |
585 LIR_OprDesc::cpu_register |
586 LIR_OprDesc::double_size);
589 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
590 LIR_OprDesc::float_type |
591 LIR_OprDesc::fpu_register |
592 LIR_OprDesc::single_size); }
594 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
595 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
596 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
599 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
600 (reg2 << LIR_OprDesc::reg2_shift) |
601 LIR_OprDesc::double_type |
602 LIR_OprDesc::fpu_register |
603 LIR_OprDesc::double_size); }
606 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
607 (reg << LIR_OprDesc::reg2_shift) |
608 LIR_OprDesc::double_type |
609 LIR_OprDesc::fpu_register |
610 LIR_OprDesc::double_size); }
612 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
613 LIR_OprDesc::float_type |
614 LIR_OprDesc::fpu_register |
615 LIR_OprDesc::single_size |
616 LIR_OprDesc::is_xmm_mask); }
617 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
618 (reg << LIR_OprDesc::reg2_shift) |
619 LIR_OprDesc::double_type |
620 LIR_OprDesc::fpu_register |
621 LIR_OprDesc::double_size |
622 LIR_OprDesc::is_xmm_mask); }
625 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
626 (reg << LIR_OprDesc::reg2_shift) |
627 LIR_OprDesc::double_type |
628 LIR_OprDesc::fpu_register |
629 LIR_OprDesc::double_size); }
630 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
631 LIR_OprDesc::float_type |
632 LIR_OprDesc::cpu_register |
633 LIR_OprDesc::single_size); }
634 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
635 (reg1 << LIR_OprDesc::reg2_shift) |
636 LIR_OprDesc::double_type |
637 LIR_OprDesc::cpu_register |
638 LIR_OprDesc::double_size); }
646 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
647 LIR_OprDesc::object_type |
648 LIR_OprDesc::cpu_register |
649 LIR_OprDesc::single_size |
650 LIR_OprDesc::virtual_mask);
654 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
655 LIR_OprDesc::int_type |
656 LIR_OprDesc::cpu_register |
657 LIR_OprDesc::single_size |
658 LIR_OprDesc::virtual_mask);
662 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
663 LIR_OprDesc::address_type |
664 LIR_OprDesc::cpu_register |
665 LIR_OprDesc::single_size |
666 LIR_OprDesc::virtual_mask);
670 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
671 LIR_OprDesc::long_type |
672 LIR_OprDesc::cpu_register |
673 LIR_OprDesc::double_size |
674 LIR_OprDesc::virtual_mask);
679 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
680 LIR_OprDesc::float_type |
681 LIR_OprDesc::cpu_register |
682 LIR_OprDesc::single_size |
683 LIR_OprDesc::virtual_mask);
686 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
687 LIR_OprDesc::double_type |
688 LIR_OprDesc::cpu_register |
689 LIR_OprDesc::double_size |
690 LIR_OprDesc::virtual_mask);
694 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
695 LIR_OprDesc::float_type |
696 LIR_OprDesc::fpu_register |
697 LIR_OprDesc::single_size |
698 LIR_OprDesc::virtual_mask);
702 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
703 LIR_OprDesc::double_type |
704 LIR_OprDesc::fpu_register |
705 LIR_OprDesc::double_size |
706 LIR_OprDesc::virtual_mask);
715 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
716 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
719 LIR_OprDesc::OprType t = as_OprType(type);
721 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
723 LIR_OprDesc::cpu_register |
724 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
726 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
727 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
728 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
744 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
745 LIR_OprDesc::object_type |
746 LIR_OprDesc::stack_value |
747 LIR_OprDesc::single_size);
751 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
752 LIR_OprDesc::int_type |
753 LIR_OprDesc::stack_value |
754 LIR_OprDesc::single_size);
758 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
759 LIR_OprDesc::address_type |
760 LIR_OprDesc::stack_value |
761 LIR_OprDesc::single_size);
765 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
766 LIR_OprDesc::long_type |
767 LIR_OprDesc::stack_value |
768 LIR_OprDesc::double_size);
772 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
773 LIR_OprDesc::float_type |
774 LIR_OprDesc::stack_value |
775 LIR_OprDesc::single_size);
778 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
779 LIR_OprDesc::double_type |
780 LIR_OprDesc::stack_value |
781 LIR_OprDesc::double_size);
789 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
791 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
792 LIR_OprDesc::stack_value |
794 LIR_OprDesc::size_for(type));
1417 , _tmp1(LIR_OprDesc::illegalOpr())
1418 , _tmp2(LIR_OprDesc::illegalOpr())
2361 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };