Cross Reference: /illumos-gate/usr/src/uts/sun4u/ngdr/io/dr.c

Lines Matching defs:devset
1053 	dr_devset_t	devset;
1059 	devset = shp->h_devset;
1080 		state_err = dr_check_transition(bp, &devset, transp, cmd);
1088 			PR_ALL("%s: invalid devset (0x%x)\n",
1089 			    f, (uint_t)devset);
1103 			shp->h_devset = devset;
1383 	dr_devset_t	devset;
1393 	devset = hp->h_devset & DR_DEVS_PRESENT(bp) &
1396 	if ((devset == 0) && DR_DEVS_PRESENT(bp)) {
1416 	DR_DEVS_DISCONNECT(bp, devset);
1418 	ASSERT((DR_DEVS_ATTACHED(bp) & devset) == 0);
1426 		if (!DEVSET_IN_SET(devset, SBD_COMP_CPU, i))
1441 		if (!DEVSET_IN_SET(devset, SBD_COMP_MEM, i))
1456 		if (!DEVSET_IN_SET(devset, SBD_COMP_IO, i))
2064 	dr_devset_t	devset;
2074 	devset = hp->h_devset & DR_DEVS_RELEASED(bp);
2084 		if (!DEVSET_IN_SET(devset, SBD_COMP_CPU, i))
2099 		if (!DEVSET_IN_SET(devset, SBD_COMP_IO, i))
2108 		if (!DEVSET_IN_SET(devset, SBD_COMP_MEM, i))
2120 	PR_ALL("%s: unreleasing devset (0x%x)\n", f, (uint_t)devset);
2122 	DR_DEVS_CANCEL(bp, devset);
2148 	dr_devset_t	devset = 0;
2165 	devset = shp->h_devset;
2207 			devset = 0;
2285 	devset &= DR_DEVS_PRESENT(bp);
2286 	if (devset == 0) {
2293 	if (DEVSET_IN_SET(devset, SBD_COMP_CPU, DEVSET_ANYUNIT))
2294 		if ((nstat = dr_cpu_status(hp, devset, devstatp)) > 0) {
2299 	if (DEVSET_IN_SET(devset, SBD_COMP_MEM, DEVSET_ANYUNIT))
2300 		if ((nstat = dr_mem_status(hp, devset, devstatp)) > 0) {
2305 	if (DEVSET_IN_SET(devset, SBD_COMP_IO, DEVSET_ANYUNIT))
2306 		if ((nstat = dr_io_status(hp, devset, devstatp)) > 0) {
2472 	dr_devset_t	devset;
2474 	devset = DR_DEVS_PRESENT(hp->h_bd);
2476 		devset &= DEVSET(hp->h_sbdcmd.cmd_cm.c_id.c_type,
2483 	 * cores for that CMP present in the devset.
2486 		if (devset & DEVSET(SBD_COMP_CMP, i)) {
2491 	/* eliminate the CPU information from the devset */
2492 	devset &= ~(DEVSET(SBD_COMP_CMP, DEVSET_ANYUNIT));
2495 		ncm += devset & 0x1;
2496 		devset >>= 1;
2577 	dr_devset_t	devset;
2582 			devset =  DEVSET(SBD_COMP_CPU, DEVSET_ANYUNIT);
2583 			devset |= DEVSET(SBD_COMP_MEM, DEVSET_ANYUNIT);
2584 			devset |= DEVSET(SBD_COMP_IO,  DEVSET_ANYUNIT);
2585 			PR_ALL("%s: COMP_NONE devset = 0x%lx\n", f, devset);
2593 				devset = 0;
2596 				 * Generate a devset that includes all the
2603 				devset = DEVSET(SBD_COMP_CMP, unit);
2606 			PR_ALL("%s: CPU devset = 0x%lx\n", f, devset);
2619 				devset = 0;
2621 				devset = DEVSET(cid->c_type, unit);
2623 			PR_ALL("%s: MEM devset = 0x%lx\n", f, devset);
2631 				devset = 0;
2633 				devset = DEVSET(cid->c_type, unit);
2635 			PR_ALL("%s: IO devset = 0x%lx\n", f, devset);
2640 			devset = 0;
2644 	return (devset);
2693 	dr_devset_t		devset;
2697 	devset = *devsetp;
2699 	if (DEVSET_IN_SET(devset, SBD_COMP_CPU, DEVSET_ANYUNIT)) {
2701 			if (DEVSET_IN_SET(devset, SBD_COMP_CPU, ut) == 0)
2707 				DEVSET_DEL(devset, SBD_COMP_CPU, ut);
2712 					DEVSET_DEL(devset, SBD_COMP_CPU, ut);
2717 	if (DEVSET_IN_SET(devset, SBD_COMP_MEM, DEVSET_ANYUNIT)) {
2719 			if (DEVSET_IN_SET(devset, SBD_COMP_MEM, ut) == 0)
2725 				DEVSET_DEL(devset, SBD_COMP_MEM, ut);
2730 					DEVSET_DEL(devset, SBD_COMP_MEM, ut);
2735 	if (DEVSET_IN_SET(devset, SBD_COMP_IO, DEVSET_ANYUNIT)) {
2737 			if (DEVSET_IN_SET(devset, SBD_COMP_IO, ut) == 0)
2743 				DEVSET_DEL(devset, SBD_COMP_IO, ut);
2748 					DEVSET_DEL(devset, SBD_COMP_IO, ut);
2754 	PR_ALL("%s: requested devset = 0x%x, final devset = 0x%x\n",
2755 	    f, (uint_t)*devsetp, (uint_t)devset);
2757 	*devsetp = devset;
2768 	return (devset ? 0 : state_err);