Cross Reference: /illumos-gate/usr/src/uts/intel/io/pci/pci

Lines Matching defs:nasgn
2367 	int nreg, nasgn;
2379 	nasgn = 0;
2461 			assigned[nasgn].pci_phys_hi =
2464 			    assigned[nasgn].pci_size_low = len;
2519 			assigned[nasgn].pci_phys_low = base;
2520 			nreg++, nasgn++;
2542 			    assigned[nasgn].pci_size_low = len;
2575 			    assigned[nasgn].pci_phys_hi = phys_hi;
2576 			assigned[nasgn].pci_phys_hi |= PCI_RELOCAT_B;
2577 			assigned[nasgn].pci_phys_mid = base_hi;
2642 			assigned[nasgn].pci_phys_low = base;
2643 			nreg++, nasgn++;
2673 		assigned[nasgn].pci_phys_hi = (PCI_RELOCAT_B |
2676 		assigned[nasgn].pci_phys_low = base;
2678 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = len;
2679 		nreg++, nasgn++;
2697 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
2699 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3b0;
2700 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0xc;
2701 		nreg++, nasgn++;
2707 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
2709 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3c0;
2710 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x20;
2711 		nreg++, nasgn++;
2717 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
2720 		    assigned[nasgn].pci_phys_low = 0xa0000;
2722 		    assigned[nasgn].pci_size_low = 0x20000;
2723 		nreg++, nasgn++;
2737 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
2739 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x2e8;
2740 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x1;
2741 		nreg++, nasgn++;
2747 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
2749 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x2ea;
2750 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x6;
2751 		nreg++, nasgn++;
2762 	    (int *)assigned, nasgn * sizeof (pci_regspec_t) / sizeof (int));