Lines Matching refs:CPU
83 struct cpu cpus[1]; /* CPU data */
120 * Init CPU info - get CPU type info for processor_info system call.
128 * Get clock-frequency property for the CPU.
152 * If called for the BSP, cp is equal to current CPU.
154 * of current CPU as default values for cpu_idstr and cpu_brandstr.
156 * has been invoked on target CPU.
158 (void) cpuid_getidstr(CPU, cp->cpu_idstr, CPU_IDSTRLEN);
159 (void) cpuid_getbrandstr(CPU, cp->cpu_brandstr, CPU_IDSTRLEN);
163 * Configure syscall support on this CPU.
254 * startup and idle threads for the specified CPU.
255 * Parameter boot is true for boot time operations and is false for CPU
288 /* Create per CPU specific threads in the process p0. */
299 * Allocate and initialize the startup thread for this CPU.
301 * when the CPU starts running.
308 * as soon as the CPU comes online.
357 * Now, initialize per-CPU idle thread for this CPU.
370 * Bootstrap the CPU's PG data
375 * Perform CPC initialization on the new CPU.
381 * for each CPU.
392 bcopy(CPU->cpu_gdt, cp->cpu_gdt, (sizeof (*cp->cpu_gdt) * NGDT));
410 ASSERT((sizeof (*CPU->cpu_idt) * NIDT) <= PAGESIZE);
413 bcopy(CPU->cpu_idt, cp->cpu_idt, PAGESIZE);
415 cp->cpu_idt = CPU->cpu_idt;
450 * Record that we have another CPU.
453 * Initialize the interrupt threads for this CPU
461 * Add CPU to list of available CPUs. It'll be on the active list
478 * Remove the CPU from the list of available CPUs.
498 * At this point, the only threads bound to this CPU should
528 /* Free CPU ID string and brand string. */
546 if (cp->cpu_idt != CPU->cpu_idt)
584 * necessarily the same. So, this routine is invoked on -every- CPU soon
589 * workaround_errata is invoked early in mlsetup() for CPU 0, and in
710 family = cpuid_getfamily(CPU);
784 ASSERT(cpu == CPU);
1302 * between the control CPU and the target CPU when starting CPUs.
1399 * During CPU DR operations, the cpu_lock is held by current
1401 * because that will break the CPU DR logic.
1487 init_cpu_info(CPU);
1489 cmn_err(CE_CONT, "?cpu%d: %s\n", CPU->cpu_id, CPU->cpu_idstr);
1490 cmn_err(CE_CONT, "?cpu%d: %s\n", CPU->cpu_id, CPU->cpu_brandstr);
1495 init_cpu_syscall(CPU);
1523 xc_init_cpu(CPU); /* initialize processor crosscalls */
1531 * We lock our affinity to the master CPU to ensure that all slave CPUs
1532 * do their TSC syncs with the same CPU.
1566 "Use \"boot-ncpus\" parameter to enable more CPU(s). "
1635 cpu_t *cp = CPU;
1644 * clear TSC if we're on a buggy Sandy/Ivy Bridge CPU, so do that
1651 cpuid_getvendor(CPU) == X86_VENDOR_Intel &&
1652 cpuid_getfamily(CPU) == 6 &&
1653 (cpuid_getmodel(CPU) == 0x2d || cpuid_getmodel(CPU) == 0x3e) &&
1658 /* Let the control CPU continue into tsc_sync_master() */
1689 * Initialize this CPU's syscall handlers
1705 * Do a sanity check to make sure this new CPU is a sane thing
1723 * the boot CPU, but is found on a later CPU, the system continues to
1726 * The reverse case, where MWAIT is available on the boot CPU but not
1727 * on a subsequently initialized CPU, is not presently allowed and will
1740 * We could be more sophisticated here, and just mark the CPU
1750 * because the cpu_lock is held by the control CPU which is running
1772 * Correct cpu_idstr and cpu_brandstr on target CPU after
1788 * this CPU must be preemptible to allow other CPUs to pause it during
1790 * the CPU state is pretty-much fully constructed.
1802 * during CPU DR operations.
1827 * Set up the CPU module for this CPU. This can't be done
1828 * before this CPU is made CPU_READY, because we may (in
1829 * heterogeneous systems) need to go load another CPU module.
1835 if ((hdl = cmi_init(CMI_HDL_NATIVE, cmi_ntv_hwchipid(CPU),
1836 cmi_ntv_hwcoreid(CPU), cmi_ntv_hwstrandid(CPU))) != NULL) {
1849 * processor initialization; the boot CPU will continue to boot once
1888 * Start CPU on user request.
1899 * Stop CPU on user request.
1927 * Take the specified CPU out of participation in interrupts.
1940 * Allow the specified CPU to participate in interrupts.