Lines Matching defs:UNM_NIC_REG
74 #define UNM_NIC_REG(X) (NIC_CRB_BASE + (X))
99 #define CRB_CMD_PRODUCER_OFFSET (UNM_NIC_REG(0x08))
100 #define CRB_CMD_CONSUMER_OFFSET (UNM_NIC_REG(0x0c))
101 #define CRB_PAUSE_ADDR_LO (UNM_NIC_REG(0x10)) /* C0 EPG BUG */
102 #define CRB_PAUSE_ADDR_HI (UNM_NIC_REG(0x14))
103 #define NX_CDRP_CRB_OFFSET (UNM_NIC_REG(0x18))
104 #define NX_ARG1_CRB_OFFSET (UNM_NIC_REG(0x1c))
105 #define NX_ARG2_CRB_OFFSET (UNM_NIC_REG(0x20))
106 #define NX_ARG3_CRB_OFFSET (UNM_NIC_REG(0x24))
107 #define NX_SIGN_CRB_OFFSET (UNM_NIC_REG(0x28))
108 #define CRB_CMDPEG_CMDRING (UNM_NIC_REG(0x38))
109 #define CRB_HOST_DUMMY_BUF_ADDR_HI (UNM_NIC_REG(0x3c))
110 #define CRB_HOST_DUMMY_BUF_ADDR_LO (UNM_NIC_REG(0x40))
111 #define CRB_CMDPEG_STATE (UNM_NIC_REG(0x50))
112 #define BOOT_LOADER_DIMM_STATUS (UNM_NIC_REG(0x54))
113 #define CRB_GLOBAL_INT_COAL (UNM_NIC_REG(0x64)) /* intrt coalescing */
114 #define CRB_INT_COAL_MODE (UNM_NIC_REG(0x68))
115 #define CRB_MAX_RCV_BUFS (UNM_NIC_REG(0x6c))
116 #define CRB_TX_INT_THRESHOLD (UNM_NIC_REG(0x70))
117 #define CRB_RX_PKT_TIMER (UNM_NIC_REG(0x74))
118 #define CRB_TX_PKT_TIMER (UNM_NIC_REG(0x78))
119 #define CRB_RX_PKT_CNT (UNM_NIC_REG(0x7c))
120 #define CRB_RX_TMR_CNT (UNM_NIC_REG(0x80))
121 #define CRB_RCV_INTR_COUNT (UNM_NIC_REG(0x84))
122 #define CRB_XG_STATE (UNM_NIC_REG(0x94)) /* XG Link status */
123 #define CRB_XG_STATE_P3 (UNM_NIC_REG(0x98)) /* XG PF Link status */
124 #define CRB_TX_STATE (UNM_NIC_REG(0xac)) /* Debug -performance */
125 #define CRB_TX_COUNT (UNM_NIC_REG(0xb0))
126 #define CRB_RX_STATE (UNM_NIC_REG(0xb4))
127 #define CRB_RX_PERF_DEBUG_1 (UNM_NIC_REG(0xb8))
128 #define CRB_RX_LRO_CONTROL (UNM_NIC_REG(0xbc)) /* LRO On/OFF */
129 #define CRB_MPORT_MODE (UNM_NIC_REG(0xc4)) /* Multiport Mode */
130 #define CRB_DMA_SHIFT (UNM_NIC_REG(0xcc)) /* DMA mask extension */
131 #define CRB_INT_VECTOR (UNM_NIC_REG(0xd4))
132 #define CRB_PF_LINK_SPEED_1 (UNM_NIC_REG(0xe8))
133 #define CRB_PF_LINK_SPEED_2 (UNM_NIC_REG(0xec))
134 #define CRB_PF_MAX_LINK_SPEED_1 (UNM_NIC_REG(0xf0))
135 #define CRB_PF_MAX_LINK_SPEED_2 (UNM_NIC_REG(0xf4))
136 #define CRB_HOST_DUMMY_BUF (UNM_NIC_REG(0xfc))
139 #define CRB_SCRATCHPAD_TEST (UNM_NIC_REG(0x280))
141 #define CRB_RCVPEG_STATE (UNM_NIC_REG(0x13c))
151 #define CRB_CMD_PRODUCER_OFFSET_1 (UNM_NIC_REG(0x1ac))
152 #define CRB_CMD_CONSUMER_OFFSET_1 (UNM_NIC_REG(0x1b0))
153 #define CRB_TEMP_STATE (UNM_NIC_REG(0x1b4))
154 #define CRB_CMD_PRODUCER_OFFSET_2 (UNM_NIC_REG(0x1b8))
155 #define CRB_CMD_CONSUMER_OFFSET_2 (UNM_NIC_REG(0x1bc))
157 #define CRB_CMD_PRODUCER_OFFSET_3 (UNM_NIC_REG(0x1d0))
158 #define CRB_CMD_CONSUMER_OFFSET_3 (UNM_NIC_REG(0x1d4))
168 #define CRB_SW_INT_MASK_0 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_0))
169 #define CRB_SW_INT_MASK_1 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_1))
170 #define CRB_SW_INT_MASK_2 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_2))
171 #define CRB_SW_INT_MASK_3 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_3))
172 #define CRB_SW_INT_MASK_4 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_4))
173 #define CRB_SW_INT_MASK_5 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_5))
174 #define CRB_SW_INT_MASK_6 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_6))
175 #define CRB_SW_INT_MASK_7 (UNM_NIC_REG(CRB_SW_INT_MASK_OFFSET_7))
177 #define CRB_NIC_DEBUG_STRUCT_BASE (UNM_NIC_REG(0x288))
179 #define CRB_NIC_CAPABILITIES_HOST (UNM_NIC_REG(0x1a8))
180 #define CRB_NIC_CAPABILITIES_FW (UNM_NIC_REG(0x1dc))
181 #define CRB_NIC_MSI_MODE_HOST (UNM_NIC_REG(0x270))
182 #define CRB_NIC_MSI_MODE_FW (UNM_NIC_REG(0x274))
187 #define CRB_EPG_QUEUE_BUSY_COUNT (UNM_NIC_REG(0x200))
189 #define CRB_V2P_0 (UNM_NIC_REG(0x290))
190 #define CRB_V2P_1 (UNM_NIC_REG(0x294))
191 #define CRB_V2P_2 (UNM_NIC_REG(0x298))
192 #define CRB_V2P_3 (UNM_NIC_REG(0x29c))
194 #define CRB_DRIVER_VERSION (UNM_NIC_REG(0x2a0))
196 #define CRB_CNT_DBG1 (UNM_NIC_REG(0x2a4))
197 #define CRB_CNT_DBG2 (UNM_NIC_REG(0x2a8))
198 #define CRB_CNT_DBG3 (UNM_NIC_REG(0x2ac))