Lines Matching refs:rum_write
387 rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)
413 rum_write(sc, reg, UGETDW(ucode));
414 /* rum_write(sc, reg, *(uint32_t *)(ucode)); */
938 rum_write(sc, RT2573_PHY_CSR3, tmp);
957 rum_write(sc, RT2573_PHY_CSR3, val);
988 rum_write(sc, RT2573_PHY_CSR4, tmp);
1007 rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
1012 rum_write(sc, RT2573_TXRX_CSR0, tmp);
1032 rum_write(sc, RT2573_TXRX_CSR4, tmp);
1046 rum_write(sc, RT2573_TXRX_CSR4, tmp);
1057 rum_write(sc, RT2573_TXRX_CSR5, 0x3);
1060 rum_write(sc, RT2573_TXRX_CSR5, 0x150);
1063 rum_write(sc, RT2573_TXRX_CSR5, 0xf);
1111 rum_write(sc, RT2573_PHY_CSR0, tmp);
1202 rum_write(sc, RT2573_TXRX_CSR10, 1 << 12 | 8);
1216 rum_write(sc, RT2573_TXRX_CSR9, tmp);
1231 rum_write(sc, RT2573_MAC_CSR9, tmp);
1242 rum_write(sc, RT2573_MAC_CSR4, tmp);
1245 rum_write(sc, RT2573_MAC_CSR5, tmp);
1254 rum_write(sc, RT2573_MAC_CSR2, tmp);
1257 rum_write(sc, RT2573_MAC_CSR3, tmp);
1274 rum_write(sc, RT2573_TXRX_CSR0, tmp);
1421 rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
1663 rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
1666 rum_write(sc, RT2573_MAC_CSR1, 3);
1667 rum_write(sc, RT2573_MAC_CSR1, 0);
1685 rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);
1688 rum_write(sc, RT2573_MAC_CSR1, 3);
1689 rum_write(sc, RT2573_MAC_CSR1, 0);
1695 rum_write(sc, RT2573_MAC_CSR12, 4); /* force wakeup */
1718 rum_write(sc, RT2573_MAC_CSR1, 4);
1743 rum_write(sc, RT2573_TXRX_CSR0, tmp);