Lines Matching defs:BITS
54 #define BITS(m, n) ((BIT(MAX((m), (n)) + 1) - 1) ^ (BIT(MIN((m), (n))) - 1))
137 #define RTW_BRSR_MBR8180_MASK BITS(1, 0) /* Maximum Basic Service Rate */
265 #define RTW_TCR_HWVERID_MASK BITS(29, 25)
277 #define RTW_TCR_MXDMA_MASK BITS(23, 21)
297 #define RTW_TCR_LBK_MASK BITS(18, 17)
311 #define RTW_TCR_SRL_MASK BITS(15, 8) /* Short Retry Limit */
312 #define RTW_TCR_LRL_MASK BITS(7, 0) /* Long Retry Limit */
341 #define RTW_RCR_RXFTH_MASK BITS(15, 13)
354 #define RTW_RCR_MXDMA_MASK BITS(10, 8)
430 #define RTW_9346CR_EEM_MASK BITS(7, 6) /* Operating Mode */
477 #define RTW_CONFIG0_GL_MASK BITS(1, 0)
502 #define RTW_CONFIG1_LEDS_MASK BITS(7, 6)
539 #define RTW_CONFIG2_PAPETIME_MASK BITS(1, 0) /* TBD, from EEPROM */
546 #define RTW_ANAPARM_RFPOW0_MASK BITS(30, 28)
559 #define RTW_ANAPARM_RFPOW1_MASK BITS(26, 20)
616 #define RTW_ANAPARM_CARDSP_MASK BITS(19, 0)
622 #define RTW_MSR_NETYPE_MASK BITS(3, 2)
713 #define RTW_CONFIG4_RFTYPE_MASK BITS(1, 0)
735 #define RTW_SCR_KM_MASK BITS(5, 4) /* Key Mode */
753 #define RTW_BCNITV_BCNITV_MASK BITS(9, 0)
758 #define RTW_ATIMWND_ATIMWND BITS(9, 0)
765 #define RTW_BINTRITV_BINTRITV BITS(9, 0)
771 #define RTW_ATIMTRITV_ATIMTRITV BITS(9, 0)
781 #define RTW_PHYDELAY_PHYDELAY BITS(2, 0)
791 #define RTW_BB_RD_MASK BITS(23, 16) /* data to read */
792 #define RTW_BB_WR_MASK BITS(15, 8) /* data to write */
794 #define RTW_BB_ADDR_MASK BITS(6, 0) /* address */
810 #define RTW_PHYCFG_MAC_RFTYPE_MASK BITS(29, 28)
815 #define RTW_PHYCFG_MAC_PHILIPS_ADDR_MASK BITS(27, 24)
816 #define RTW_PHYCFG_MAC_PHILIPS_DATA_MASK BITS(23, 0)
817 #define RTW_PHYCFG_MAC_MAXIM_LODATA_MASK BITS(27, 24)
818 #define RTW_PHYCFG_MAC_MAXIM_ADDR_MASK BITS(11, 8)
819 #define RTW_PHYCFG_MAC_MAXIM_HIDATA_MASK BITS(7, 0)
824 #define RTW_MAXIM_HIDATA_MASK BITS(11, 4)
825 #define RTW_MAXIM_LODATA_MASK BITS(3, 0)
959 #define RTW_CWR_CW BITS(9, 0)
968 #define RTW_RETRYCTR_RETRYCT BITS(7, 0)
1049 #define RTW_SR_RFPARM_CS_MASK BITS(2, 3) /* carrier-sense type */
1083 #define RTW_TXCTL0_RATE_MASK BITS(27, 24) /* Tx rate */
1091 #define RTW_TXCTL0_RTSRATE_MASK BITS(22, 19) /* Tx rate */
1103 #define RTW_TXCTL0_KEYID_MASK BITS(15, 14) /* default key id */
1104 #define RTW_TXCTL0_RSVD1_MASK BITS(13, 12) /* reserved */
1108 #define RTW_TXCTL0_TPKTSIZE_MASK BITS(11, 0)
1114 #define RTW_TXSTAT_RSVD1_MASK BITS(27, 16)
1116 #define RTW_TXSTAT_RTSRETRY_MASK BITS(14, 8) /* RTS retry count */
1117 #define RTW_TXSTAT_DRC_MASK BITS(7, 0) /* Data retry count */
1123 #define RTW_TXCTL1_LENGTH_MASK BITS(30, 16) /* PLCP length (microseconds) */
1127 #define RTW_TXCTL1_RTSDUR_MASK BITS(15, 0)
1129 #define RTW_TXLEN_LENGTH_MASK BITS(11, 0) /* Tx buffer length in bytes */
1150 #define RTW_RXCTL_RSVD0_MASK BITS(29, 12) /* reserved */
1151 #define RTW_RXCTL_LENGTH_MASK BITS(11, 0) /* Rx buffer length */
1167 #define RTW_RXSTAT_RATE_MASK BITS(23, 20) /* Rx rate */
1191 #define RTW_RXSTAT_LENGTH_MASK BITS(11, 0)
1207 #define RTW_RXRSSI_VLAN BITS(32, 16) /* XXX from reference driver */
1211 #define RTW_RXRSSI_RSSI BITS(15, 8) /* RF energy at the PHY */
1215 #define RTW_RXRSSI_IMR_RSSI BITS(15, 9) /* RF energy at the PHY */
1217 #define RTW_RXRSSI_SQ BITS(7, 0) /* Barker code-lock quality */
1364 #define RTW_BBP_SYS2_RATE_MASK BITS(5, 4)
1369 #define RTW_BBP_SYS3_CSTHRESH_MASK BITS(0, 3)