Lines Matching refs:mode
32 /* DBGI command mode */
73 /* IDT LAR register address and value for 144-bit mode (low 32 bits) */
113 unsigned char mode;
228 if (mc5->mode == MC5_MODE_144_BIT)
242 mc5->mode == MC5_MODE_144_BIT ?
264 /* Set DBGI command mode for Lara TCAM. */
267 dbgi_wr_data3(adap, mc5->mode == MC5_MODE_144_BIT ?
273 dbgi_wr_data3(adap, mc5->mode == MC5_MODE_144_BIT ?
282 dbgi_wr_data3(adap, mc5->mode == MC5_MODE_72_BIT ?
295 if (i <= 1 && mc5->mode == MC5_MODE_72_BIT)
340 /* Set DBGI command mode for IDT TCAM. */
380 /* Put MC5 in DBGI mode. */
384 V_MODE(mc5->mode == MC5_MODE_72_BIT) |
388 /* Put MC5 in M-Bus mode. */
392 V_MODE(mc5->mode == MC5_MODE_72_BIT) |
393 V_COMPRESSION_ENABLE(mc5->mode == MC5_MODE_72_BIT) |
413 cfg |= V_MODE(mc5->mode == MC5_MODE_72_BIT) | F_TCAM_RESET;
425 if (mc5->mode == MC5_MODE_72_BIT)
634 struct pemc5 * __devinit t1_mc5_create(adapter_t *adapter, int mode)
639 if (mode != MC5_MODE_144_BIT && mode != MC5_MODE_72_BIT)
646 mc5->mode = (unsigned char) mode;
655 * Calculate the size of the TCAM based on the total memory, mode, and
658 bits_per_entry = mode == MC5_MODE_144_BIT ? 144 : 72;
693 * Disable compression and M bus mode so that the TP core
706 /* Restore MC5 mode. */