Lines Matching refs:val
64 static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)
68 t1_write_reg_4(adapter, addr, val);
69 val = t1_read_reg_4(adapter, addr); /* flush */
86 u32 val;
91 val = t1_read_reg_4(adapter, A_MC4_CFG);
92 t1_write_reg_4(adapter, A_MC4_CFG, val | F_POWER_UP);
93 val = t1_read_reg_4(adapter, A_MC4_CFG); /* flush */
96 slow_mode = val & F_MC4A_SLOW;
97 width = G_MC4A_WIDTH(val);
102 val = t1_read_reg_4(adapter, A_MC4_STROBE);
104 val & ~F_SLAVE_DLL_RESET);
110 slow_mode = val & F_MC4_SLOW;
111 width = !!(val & F_MC4_NARROW);
115 val = t1_read_reg_4(adapter, A_MC4_STROBE);
117 val & ~F_MASTER_DLL_RESET);
123 val = t1_read_reg_4(adapter, A_MC4_STROBE);
124 } while (!(val & MC4_DLL_DONE) && --attempts);
125 if (!(val & MC4_DLL_DONE)) {
145 val = t1_read_reg_4(adapter, A_MC4_REFRESH);
146 if (wrreg_wait(adapter, A_MC4_REFRESH, val & ~F_REFRESH_ENABLE))
150 if (wrreg_wait(adapter, A_MC4_REFRESH, val & ~F_REFRESH_ENABLE))
176 val = t1_read_reg_4(adapter, A_MC4_BIST_OP);
177 } while ((val & F_BUSY) && --attempts);
178 if (val & F_BUSY) {
184 val = t1_read_reg_4(adapter, A_MC4_CFG);
185 t1_write_reg_4(adapter, A_MC4_CFG, val | F_READY);
186 val = t1_read_reg_4(adapter, A_MC4_CFG); /* flush */
309 u32 val;
313 val = t1_read_reg_4(adap, A_MC4_BD_OP);
314 while ((val & F_BUSY) && attempts--)
315 val = t1_read_reg_4(adap, A_MC4_BD_OP);
317 if (val & F_BUSY)