Lines Matching refs:mode
83 uint_t it_always64:1; /* 64 bit when in 64 bit mode */
284 * "y" - means the operand size is always 64 bits in 64 bit mode
373 * this decodes the r_m field for mode's 0, 1, 2 in 16 bit mode
386 * This decodes 32 bit addressing mode r_m field for modes 0, 1, 2
399 * This decodes 64 bit addressing mode r_m field for modes 0, 1, 2
501 * "decode table" for 64 bit mode MOVSXD instruction (opcode 0x63)
567 * Decode table for 0x0FC7 opcode (group 9) mode 3
2297 * Even in 64 bit mode, usually only 4 byte immediate operands are supported.
2311 #define REG_ONLY 3 /* mode to indicate a register operand (not memory) */
2326 * there's not really a consistent scheme that we can use to know what the mode
2449 * mode, register, and r/m fields.
2452 dtrace_get_modrm(dis86_t *x, uint_t *mode, uint_t *reg, uint_t *r_m)
2457 dtrace_get_SIB(x, mode, reg, r_m);
2467 dtrace_rex_adjust(uint_t rex_prefix, uint_t mode, uint_t *reg, uint_t *r_m)
2486 dtrace_vex_adjust(uint_t vex_byte1, uint_t mode, uint_t *reg, uint_t *r_m)
2599 * mode = addressing mode from ModRM byte
2600 * r_m = r_m (or reg if mode == 3) field from ModRM byte
2608 dtrace_get_operand(dis86_t *x, uint_t mode, uint_t r_m, int wbit, int opindex)
2628 if (mode == REG_ONLY) {
2681 * the mode values more simply.
2682 * mode 1 is r_m + 8 bit displacement
2683 * mode 2 is r_m + 16 bit displacement
2684 * mode 0 is just r_m, unless r_m is 6 which is 16 bit disp
2687 if ((mode == 0 && r_m == 6) || mode == 2)
2689 else if (mode == 1)
2692 if (mode == 0 && r_m == 6)
2694 else if (mode == 0)
2698 (void) strlcat(opnd, dis_addr16[mode][r_m], OPLEN);
2712 if (base != 5 || mode != 0)
2726 if (mode == 1)
2728 else if (mode == 2)
2747 if (mode == 0)
2754 if (mode == 0) {
2790 if (base == EBP_REGNO && mode == 0) {
2821 #define STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, vbit) { \
2822 dtrace_get_modrm(x, &mode, ®, &r_m); \
2823 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m); \
2824 dtrace_get_operand(x, mode, r_m, wbit, vbit); \
2834 #define MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, w2, vbit) { \
2835 dtrace_get_modrm(x, &mode, ®, &r_m); \
2836 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m); \
2837 dtrace_get_operand(x, mode, r_m, wbit, vbit); \
2847 #define THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, immsize, vbit) { \
2848 dtrace_get_modrm(x, &mode, ®, &r_m); \
2849 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m); \
2850 dtrace_get_operand(x, mode, r_m, wbit, 2-vbit); \
2858 #define FOUROPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, immsize) { \
2859 dtrace_get_modrm(x, &mode, ®, &r_m); \
2860 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m); \
2861 dtrace_get_operand(x, mode, r_m, wbit, 2); \
2870 #define ONEOPERAND_TWOIMM(x, mode, reg, r_m, rex_prefix, wbit, immsize) { \
2871 dtrace_get_modrm(x, &mode, ®, &r_m); \
2872 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m); \
2873 dtrace_get_operand(x, mode, r_m, wbit, 2); \
2881 * Mode determines the default operating mode (SIZE16, SIZE32 or SIZE64)
2904 uint_t mode = 0; /* mode value from ModRM byte */
2941 * For 32-bit mode, it should prefetch the next byte to
3049 * Handle amd64 mode PREFIX values.
3070 dtrace_get_modrm(x, &mode, ®, &r_m);
3073 if (mode == REG_ONLY) {
3077 opcode3 = (((mode << 3) | reg)>>1) & 0x0F;
3093 * mode vex prefix, their default values are 1
3344 * However, if the CPU is in 64-bit mode, then and only
3346 * and REX.r allows 64-bit mode to use register r8-r15.
3416 dtrace_get_modrm(x, &mode, &opcode3, &r_m);
3425 if (opcode2 == 0xB && mode == 0x3 && opcode3 == 4)
3427 else if (opcode2 == 0xA && mode == 0x3 && opcode3 < 4)
3429 else if (opcode2 == 0xB && mode == 0x3)
3431 else if (opcode2 == 0x9 && mode == 0x3 && opcode3 >= 4)
3433 else if (mode == 0x3)
3445 * In amd64 bit mode, ARPL opcode is changed to MOVSXD
3528 * addressing mode (and an indirect table), so we deal with it
3533 * bytes. The VMX instructions have a mode of 0 since they are
3534 * memory instructions but rdrand instructions have a mode of
3550 * If we have a mode of 0b11 then we have to rewrite this.
3552 dtrace_get_modrm(x, &mode, ®, &r_m);
3553 if (mode == REG_ONLY) {
3625 * In 64 bit mode, some opcodes automatically use opnd_size == SIZE64.
3685 * In vex mode the rex_prefix has no meaning
3702 dtrace_get_modrm(x, &mode, ®, &r_m);
3703 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
3708 dtrace_get_operand(x, mode, r_m, wbit, 0);
3722 dtrace_get_modrm(x, &mode, ®, &r_m);
3723 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
3727 dtrace_get_operand(x, mode, r_m, wbit, 0);
3735 dtrace_get_modrm(x, &mode, ®, &r_m);
3736 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
3741 dtrace_get_operand(x, mode, r_m, wbit, 0);
3749 dtrace_get_modrm(x, &mode, ®, &r_m);
3750 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
3757 dtrace_get_operand(x, mode, r_m, wbit, 1);
3761 dtrace_get_operand(x, mode, r_m, wbit, 0);
3771 THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND,
3779 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 0);
3789 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
3795 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
3806 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 1);
3811 dtrace_get_modrm(x, &mode, ®, &r_m);
3812 if (mode == REG_ONLY)
3815 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 1);
3821 dtrace_get_modrm(x, &mode, ®, &r_m);
3822 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
3823 dtrace_get_operand(x, mode, r_m, wbit, 2);
3833 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
3839 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
3840 dtrace_get_operand(x, mode, r_m, wbit, 1);
3851 dtrace_get_modrm(x, &mode, ®, &r_m);
3852 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
3853 dtrace_get_operand(x, mode, r_m, wbit, 1);
3863 dtrace_rex_adjust(rex_prefix, mode, ®, NULL);
3864 mode = REG_ONLY;
3866 dtrace_get_operand(x, mode, r_m, wbit, 1);
3881 dtrace_rex_adjust(rex_prefix, mode, ®, NULL);
3910 dtrace_get_modrm(x, &mode, ®, &r_m);
3911 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
3912 dtrace_get_operand(x, mode, r_m, LONG_OPND, vbit);
3923 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
3924 dtrace_get_operand(x, mode, r_m, wbit, 1);
3941 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
3942 dtrace_get_operand(x, mode, r_m, wbit, 1);
3955 dtrace_get_modrm(x, &mode, ®, &r_m);
3956 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
3957 dtrace_get_operand(x, mode, r_m, wbit, 0);
3961 if (cpu_mode == SIZE64 && mode == 3 && r_m == 0) {
3967 } else if (mode == 3 && r_m == 1) {
3994 if (mode == 3) {
4026 if (mode == 3) {
4064 if (mode == 3) {
4095 if (mode == 3) {
4117 dtrace_get_modrm(x, &mode, ®, &r_m);
4118 if (mode == 3)
4120 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
4121 dtrace_get_operand(x, mode, r_m, wbit, 0);
4150 dtrace_get_modrm(x, &mode, ®, &r_m);
4151 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
4166 dtrace_rex_adjust(rex_prefix, mode, ®, NULL);
4178 dtrace_rex_adjust(rex_prefix, mode, ®, NULL);
4209 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 0);
4215 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
4226 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 0);
4235 dtrace_get_modrm(x, &mode, ®, &r_m);
4236 if (mode != REG_ONLY)
4239 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
4240 dtrace_get_operand(x, mode, r_m, wbit, 0);
4242 mode = 0; /* change for memory access size... */
4252 dtrace_get_modrm(x, &mode, ®, &r_m);
4253 if (mode != REG_ONLY)
4256 THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND, 1,
4262 THREEOPERAND(x, mode, reg, r_m, rex_prefix, LONG_OPND, XMM_OPND,
4276 THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, 1, 1);
4288 dtrace_get_modrm(x, &mode, ®, &r_m);
4289 if (mode != REG_ONLY)
4292 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND, 0);
4302 STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 0);
4304 if (dp->it_adrmode == XMMXIMPL && mode != REG_ONLY)
4313 if (mode == REG_ONLY) {
4321 mode = 0; /* change for memory access size... */
4329 dtrace_get_modrm(x, &mode, ®, &r_m);
4334 mode == REG_ONLY)
4338 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 1);
4346 dtrace_get_modrm(x, &mode, ®, &r_m);
4348 if (mode == REG_ONLY) {
4355 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 0);
4361 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 0);
4366 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 1);
4374 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 0);
4382 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 0);
4389 MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND, 0);
4395 dtrace_get_modrm(x, &mode, ®, &r_m);
4396 if (mode != REG_ONLY)
4398 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
4399 dtrace_get_operand(x, mode, r_m, XMM_OPND, 0);
4410 THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 1,
4443 FOUROPERAND(x, mode, reg, r_m, rex_prefix, XMM_OPND, XMM_OPND,
4449 ONEOPERAND_TWOIMM(x, mode, reg, r_m, rex_prefix, XMM_OPND, 1);
4464 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
4465 dtrace_get_operand(x, mode, r_m, wbit, 0);
4545 dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
4546 dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
4689 * sfence is sfence if mode is REG_ONLY. If mode isn't
4692 dtrace_get_modrm(x, &mode, ®, &r_m);
4696 if (mode == REG_ONLY) {
4700 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
4701 dtrace_get_operand(x, mode, r_m, BYTE_OPND, 0);
4705 if (mode != REG_ONLY) {
4706 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
4707 dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
4726 * XRSTOR and LFENCE share the same opcode but differ in mode
4728 dtrace_get_modrm(x, &mode, ®, &r_m);
4730 if (mode == REG_ONLY) {
4744 dtrace_rex_adjust(rex_prefix, mode, ®, &r_m);
4745 dtrace_get_operand(x, mode, r_m, BYTE_OPND, 0);
4777 dtrace_get_modrm(x, &mode, ®, &r_m);
4782 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4783 dtrace_get_operand(x, mode, r_m, wbit, 0);
4789 dtrace_get_modrm(x, &mode, ®, &r_m);
4790 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4811 if (mode != REG_ONLY) {
4837 else if ((mode == REG_ONLY) &&
4840 } else if ((mode == REG_ONLY) &&
4845 dtrace_get_operand(x, mode, r_m, wbit, 0);
4852 dtrace_get_modrm(x, &mode, ®, &r_m);
4853 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4862 dtrace_get_operand(x, mode, r_m, wbit, 1);
4883 dtrace_get_modrm(x, &mode, ®, &r_m);
4884 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4893 dtrace_get_operand(x, mode, r_m, vreg->dgr_arg1, 1);
4900 dtrace_get_modrm(x, &mode, ®, &r_m);
4901 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4903 if (mode != REG_ONLY) {
4913 dtrace_get_operand(x, mode, r_m, wbit, 2);
4922 dtrace_get_modrm(x, &mode, ®, &r_m);
4923 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4928 dtrace_get_operand(x, mode, r_m, XMM_OPND, 1);
4933 dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
4940 dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
4942 dtrace_get_operand(x, mode, r_m, wbit, 1);
4971 dtrace_get_modrm(x, &mode, ®, &r_m);
4972 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
4982 dtrace_get_operand(x, mode, r_m, wbit, 0);
4997 dtrace_get_operand(x, mode, r_m, XMM_OPND, 0);
5005 dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
5008 dtrace_get_operand(x, mode, r_m, wbit, 0);
5017 dtrace_get_modrm(x, &mode, ®, &r_m);
5018 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5021 dtrace_get_operand(x, mode, r_m, wbit, 1);
5031 dtrace_get_modrm(x, &mode, ®, &r_m);
5036 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5056 dtrace_get_modrm(x, &mode, ®, &r_m);
5057 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5059 dtrace_get_operand(x, mode, r_m, wbit, vbit - 1);
5070 dtrace_get_modrm(x, &mode, ®, &r_m);
5071 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5073 dtrace_get_operand(x, mode, r_m, wbit, 0);
5083 dtrace_get_modrm(x, &mode, ®, &r_m);
5084 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5086 dtrace_get_operand(x, mode, r_m, XMM_OPND, 2);
5096 dtrace_get_modrm(x, &mode, ®, &r_m);
5097 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5098 dtrace_get_operand(x, mode, r_m, wbit, 1);
5106 dtrace_get_modrm(x, &mode, ®, &r_m);
5107 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5115 dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
5117 dtrace_get_operand(x, mode, r_m, wbit, 1);
5126 dtrace_get_modrm(x, &mode, ®, &r_m);
5127 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5136 dtrace_get_operand(x, mode, r_m, LONG_OPND, 2);
5146 dtrace_get_modrm(x, &mode, ®, &r_m);
5147 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5149 dtrace_get_operand(x, mode, r_m, XMM_OPND, 2);
5160 dtrace_get_modrm(x, &mode, ®, &r_m);
5161 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5163 dtrace_get_operand(x, mode, r_m, LONG_OPND, 2);
5171 dtrace_get_modrm(x, &mode, ®, &r_m);
5172 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5175 dtrace_get_operand(x, mode, r_m, wbit, vbit);
5184 dtrace_get_modrm(x, &mode, ®, &r_m);
5185 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5186 dtrace_get_operand(x, mode, r_m, wbit, 2);
5196 dtrace_get_modrm(x, &mode, ®, &r_m);
5197 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5220 dtrace_get_modrm(x, &mode, ®, &r_m);
5221 dtrace_vex_adjust(vex_byte1, mode, ®, &r_m);
5248 dtrace_get_operand(x, mode, r_m, wbit, 0);
5283 } else if (nomem || mode == REG_ONLY) {
5288 * In 64 bit mode descriptor table entries
5426 dtrace_disx86_str(dis86_t *dis, uint_t mode, uint64_t pc, char *buf,
5529 switch (mode) {