Lines Matching defs:opcode2
2909 uint_t opcode2; /* low nibble of 1st byte */
3000 if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
3003 if (opcode1 == 0 && opcode2 == 0 &&
3017 dp = (instable_t *)&dis_distable[opcode1][opcode2];
3043 *which_prefix = (opcode1 << 4) | opcode2;
3044 if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
3058 rex_prefix = (opcode1 << 4) | opcode2;
3059 if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
3061 dp = (instable_t *)&dis_distable[opcode1][opcode2];
3063 (opcode2 == 0x4 || opcode2 == 0x5)) {
3065 vex_prefix = (opcode1 << 4) | opcode2;
3068 } else if (opcode1 == 0xC && (opcode2 == 0x4 || opcode2 == 0x5)) {
3075 vex_prefix = (opcode1 << 4) | opcode2;
3100 if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
3106 &dis_opAVX660F[(opcode1 << 4) | opcode2];
3110 &dis_opAVXF30F[(opcode1 << 4) | opcode2];
3114 &dis_opAVXF20F [(opcode1 << 4) | opcode2];
3118 &dis_opAVX0F[opcode1][opcode2];
3155 if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
3163 [(opcode1 << 4) | opcode2];
3167 [(opcode1 << 4) | opcode2];
3171 [(opcode1 << 4) | opcode2];
3180 [(opcode1 << 4) | opcode2];
3184 [(opcode1 << 4) | opcode2];
3193 [(opcode1 << 4) | opcode2];
3197 [(opcode1 << 4) | opcode2];
3201 [(opcode1 << 4) | opcode2];
3208 &dis_opAVX0F[opcode1][opcode2];
3252 if (rep_prefix == 0xf3 && opcode1 == 0x9 && opcode2 == 0x0) {
3424 if (opcode1 == 0xD && opcode2 >= 0x8) {
3425 if (opcode2 == 0xB && mode == 0x3 && opcode3 == 4)
3427 else if (opcode2 == 0xA && mode == 0x3 && opcode3 < 4)
3429 else if (opcode2 == 0xB && mode == 0x3)
3431 else if (opcode2 == 0x9 && mode == 0x3 && opcode3 >= 4)
3435 &dis_opFP3[opcode2 - 8][opcode3];
3438 &dis_opFP1n2[opcode2 - 8][opcode3];
3449 opcode1 == 0x6 && opcode2 == 0x3)
3772 OPSIZE(opnd_size, opcode2 == 0x9), 1);
3778 wbit = WBIT(opcode2);
3788 wbit = WBIT(opcode2);
3838 wbit = WBIT(opcode2);
3844 dtrace_imm_opnd(x, wbit, OPSIZE(opnd_size, opcode2 == 1), 0);
3850 wbit = WBIT(opcode2);
3861 wbit = opcode2 >>3 & 0x1;
3862 reg = REGNO(opcode2);
3894 wbit = WBIT(opcode2);
3921 vbit = VBIT(opcode2);
3922 wbit = WBIT(opcode2);
3939 wbit = WBIT(opcode2);
3953 wbit = WBIT(opcode2);
4165 reg = REGNO(opcode2);
4177 reg = REGNO(opcode2);
4455 wbit = WBIT(opcode2);
4463 wbit = WBIT(opcode2);
4495 wbit = WBIT(opcode2);
4514 wbit = WBIT(opcode2);
4761 vbit = opcode2 >> 2 & 0x1; /* vbit = 1: st -> st(i) */
4875 vreg = &dis_vgather[opcode2][vex_W][vex_L];
5033 (void) strncpy(x->d86_mnem, dis_AVXvgrp7[opcode2 - 1][reg],
5294 (opcode2 == 0xc || opcode2 == 0xd))