Lines Matching defs:cfg_prg
438 pcitool_reg_t cfg_prg;
443 cfg_prg.offset = 0;
444 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
445 cfg_prg.bus_no = bus_no;
446 cfg_prg.dev_no = dev_no;
447 cfg_prg.func_no = func_no;
448 cfg_prg.barnum = 0;
449 cfg_prg.user_version = PCITOOL_VERSION;
453 cfg_prg.offset += sizeof (uint32_t);
455 ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg)) != SUCCESS) {
458 config_hdr_p->dwords[i] = (uint32_t)cfg_prg.data;
466 pcitool_reg_t cfg_prg;
473 cfg_prg.bus_no = bus_no;
474 cfg_prg.dev_no = dev_no;
475 cfg_prg.func_no = func_no;
476 cfg_prg.barnum = 0;
477 cfg_prg.user_version = PCITOOL_VERSION;
478 cfg_prg.offset = 0;
479 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + PCITOOL_ACC_ATTR_ENDN_LTL;
481 if (ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg) != SUCCESS) {
485 data = (uint32_t)cfg_prg.data;
489 cfg_prg.offset = PCI_CONF_COMM;
490 if (ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg) != SUCCESS) {
494 data = (uint32_t)cfg_prg.data;
498 cfg_prg.offset = PCI_CONF_CAP_PTR;
499 if (ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg) != SUCCESS) {
502 data = (uint32_t)cfg_prg.data;
515 cfg_prg.offset = hdr_next_ptr;
517 if (ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg) != SUCCESS)
520 data = (uint32_t)cfg_prg.data;
546 cfg_prg.offset = hdr_next_ptr;
548 if (ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg) != SUCCESS) {
551 data = (uint32_t)cfg_prg.data;