tcg.c revision 8a68de6c5784b93a29226925982506d6d9c2d82e
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * Tiny Code Generator for QEMU
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * Copyright (c) 2008 Fabrice Bellard
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * Permission is hereby granted, free of charge, to any person obtaining a copy
3a8aa22ef125135ef67bfc396771bcee15ef02dfvboxsync * of this software and associated documentation files (the "Software"), to deal
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * in the Software without restriction, including without limitation the rights
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * copies of the Software, and to permit persons to whom the Software is
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * furnished to do so, subject to the following conditions:
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * The above copyright notice and this permission notice shall be included in
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * all copies or substantial portions of the Software.
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync * THE SOFTWARE.
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* define it to use liveness analysis (better code) */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* define it to suppress various consistency checks (faster) */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync#else /* VBOX */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync#endif /* VBOX */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* Note: the long term plan is to reduce the dependancies on the QEMU
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync CPU definitions. Currently they are used for qemu_ld/st
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync instructions */
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync#if defined(CONFIG_USE_GUEST_BASE) && !defined(TCG_TARGET_HAS_GUEST_BASE)
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync * Liveness analysis doesn't work well with 32-bit hosts and 64-bit targets,
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync * second element of the register pair to store 64-bit value is considered
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync * dead, it seems. */
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync /** @todo re-test this */
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync# if defined(TARGET_X86_64) && (TCG_TARGET_REG_BITS == 32)
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsync#endif /* VBOX */
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsyncstatic void tcg_target_qemu_prologue(TCGContext *s);
89aedeb1d8af54aba6ae46dbbd256281315c1be6vboxsyncstatic void patch_reloc(uint8_t *code_ptr, int type,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync#define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
508452243fd3328f7b9e0405d39fb9dc004e31b8vboxsync/* XXX: move that inside the context */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic inline void tcg_out8(TCGContext *s, uint8_t v)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic inline void tcg_out16(TCGContext *s, uint16_t v)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic inline void tcg_out32(TCGContext *s, uint32_t v)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* label relocation processing */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
6e12ccc60ac657fb87e27b7a2b26e0a63bebe024vboxsync /* FIXME: This may break relocations on RISC targets that
6e12ccc60ac657fb87e27b7a2b26e0a63bebe024vboxsync modify instruction fields in place. The caller may not have
6e12ccc60ac657fb87e27b7a2b26e0a63bebe024vboxsync written the initial value. */
6e12ccc60ac657fb87e27b7a2b26e0a63bebe024vboxsync /* add a new relocation entry */
6e12ccc60ac657fb87e27b7a2b26e0a63bebe024vboxsyncstatic void tcg_out_label(TCGContext *s, int label_index,
657b2c9f6d33f08001e5fa6f6e0572dcf0391013vboxsync while (r != NULL) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* pool based memory allocation */
7e837ad8d6aeb3f86520ea7adb61e4eb15f2087evboxsync /* big malloc: insert a new pool (XXX: could optimize) */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync memset(s, 0, sizeof(*s));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* Count total number of arguments and allocate the corresponding
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync args_ct = qemu_malloc(sizeof(TCGArgConstraint) * total_args);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync sorted_args = qemu_malloc(sizeof(int) * total_args);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* init global prologue and epilogue */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic inline void tcg_temp_alloc(TCGContext *s, int n)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic inline int tcg_global_reg_new_internal(TCGType type, int reg,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync const char *name)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncTCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncTCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic inline int tcg_global_mem_new_internal(TCGType type, int reg,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync const char *name)
e48239695d41f806ff02d8a60b97dc20d4822d7avboxsyncTCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync const char *name)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
4f3d37f3c8ea851c3d57304fac430764b77a84dcvboxsyncTCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsync const char *name)
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsync idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsyncstatic inline int tcg_temp_new_internal(TCGType type, int temp_local)
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsync /* There is already an available temp with the
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsync right type */
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsync idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
b4bcdbd7ac35c938e6f71a6403fe9f3ebf106a07vboxsync idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncvoid tcg_register_helper(void *func, const char *name)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync if (n == 0) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync s->helpers = qemu_realloc(s->helpers, n * sizeof(TCGHelperInfo));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* Note: we convert the 64 bit args to 32 bit and do some alignment
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync and endian swap. Maybe it would be better to do the alignment
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync and endian swap in tcg_reg_alloc_call(). */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncvoid tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for (i = 0; i < nargs; ++i) {
3933885bc0c2c93436d858a14564c6179ec72872vboxsync#endif /* TCG_TARGET_EXTEND_ARGS */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for (i = 0; i < nargs; i++) {
36a04912b64bea8318327fe0723535f1b3f041b0vboxsync /* REGPARM case: if the third parameter is 64 bit, it is
36a04912b64bea8318327fe0723535f1b3f041b0vboxsync allocated on the stack */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
a72b5355eb89aafe6bfcc8912cf02645d7cccceavboxsync /* some targets want aligned 64 bit args */
3933885bc0c2c93436d858a14564c6179ec72872vboxsync /* If stack grows up, then we will be placing successive
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync arguments at lower addresses, which means we need to
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync reverse the order compared to how we would normally
3933885bc0c2c93436d858a14564c6179ec72872vboxsync treat either big or little-endian. For those arguments
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync that will wind up in registers, this still works for
3933885bc0c2c93436d858a14564c6179ec72872vboxsync HPPA (the only current STACK_GROWSUP target) since the
3933885bc0c2c93436d858a14564c6179ec72872vboxsync argument registers are *also* allocated in decreasing
3933885bc0c2c93436d858a14564c6179ec72872vboxsync order. If another such target is added, this logic may
3933885bc0c2c93436d858a14564c6179ec72872vboxsync have to get more complicated to differentiate between
3933885bc0c2c93436d858a14564c6179ec72872vboxsync stack arguments and register arguments. */
3933885bc0c2c93436d858a14564c6179ec72872vboxsync#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
3933885bc0c2c93436d858a14564c6179ec72872vboxsync#endif /* TCG_TARGET_REG_BITS < 64 */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* total parameters, needed to go backward in the instruction stream */
70ca8d009d026a301bf7fa08cd18c6494c45fdeevboxsync#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
70ca8d009d026a301bf7fa08cd18c6494c45fdeevboxsync for (i = 0; i < nargs; ++i) {
3933885bc0c2c93436d858a14564c6179ec72872vboxsync#endif /* TCG_TARGET_EXTEND_ARGS */
3933885bc0c2c93436d858a14564c6179ec72872vboxsyncvoid tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
3933885bc0c2c93436d858a14564c6179ec72872vboxsync if (c == 0) {
3933885bc0c2c93436d858a14564c6179ec72872vboxsync } else if (c >= 32) {
3933885bc0c2c93436d858a14564c6179ec72872vboxsync tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
3933885bc0c2c93436d858a14564c6179ec72872vboxsync tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
3933885bc0c2c93436d858a14564c6179ec72872vboxsync tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
3933885bc0c2c93436d858a14564c6179ec72872vboxsync tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* Note: ret can be the same as arg1, so we use t1 */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(i = 0; i < s->nb_globals; i++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncchar *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncchar *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic int helper_cmp(const void *p1, const void *p2)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* find helper definition (Note: A hash table would be better) */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync qemu_qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
1207f59aa62006952dbb0bf7700decf34d8caeb2vboxsync qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* binary search */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync else if (val < v) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic const char * const cond_name[] =
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync } else if (c == INDEX_op_call) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* variable number of arguments */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* function name */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + nb_iargs - 1]));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* flags */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* nb out args */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(i = 0; i < nb_oargs; i++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i]));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + i]));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync } else if (c == INDEX_op_movi_i32
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync /* variable number of arguments */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(i = 0; i < nb_oargs; i++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync if (k != 0)
629169500a4e1696f37dd3118a791d68278f71davboxsync tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
629169500a4e1696f37dd3118a791d68278f71davboxsync for(i = 0; i < nb_iargs; i++) {
629169500a4e1696f37dd3118a791d68278f71davboxsync if (k != 0)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync switch (c) {
4c13f0d619c9707412b40eae8e3beafae5cf1858vboxsync if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]])
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(; i < nb_cargs; i++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync if (k != 0)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync/* we give more priority to constraints with less registers */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic int get_constraint_priority(const TCGOpDef *def, int k)
1207f59aa62006952dbb0bf7700decf34d8caeb2vboxsync /* an alias is equivalent to a single register */
b2c92fb03e119c7de54f86a32fae9c1d59bc479evboxsync for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
3a8aa22ef125135ef67bfc396771bcee15ef02dfvboxsync/* sort from highest priority to lowest */
4328e87247f4a96449677e199c7e99ef516fc1cevboxsyncstatic void sort_constraints(TCGOpDef *def, int start, int n)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(i = 0; i < n; i++)
1ce069685b24d243eb0464f46d4c56b250c64445vboxsync if (n <= 1)
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(i = 0; i < n - 1; i++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync for(j = i + 1; j < n; j++) {
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync p1 = get_constraint_priority(def, def->sorted_args[start + i]);
825c2485cf84eec495985ffd605a1c9cddee8c32vboxsync p2 = get_constraint_priority(def, def->sorted_args[start + j]);
4328e87247f4a96449677e199c7e99ef516fc1cevboxsync def->sorted_args[start + i] = def->sorted_args[start + j];
const char *ct_str;
int i, nb_args;
#if defined(CONFIG_DEBUG_TCG)
for(i = 0; i < nb_args; i++) {
int oarg;
switch(*ct_str) {
ct_str++;
#ifndef VBOX
tdefs++;
#if defined(CONFIG_DEBUG_TCG)
tcg_abort();
#ifdef USE_LIVENESS_ANALYSIS
if (nb_args == 0) {
dead_temps[i] = 0;
ts++;
unsigned int dead_iargs;
while (op_index >= 0) {
switch(op) {
case INDEX_op_call:
int call_flags;
args++;
for(i = 0; i < nb_oargs; i++) {
goto do_not_remove_call;
for(i = 0; i < nb_oargs; i++) {
dead_iargs = 0;
for(i = 0; i < nb_iargs; i++) {
args--;
case INDEX_op_set_label:
args--;
case INDEX_op_nopn:
case INDEX_op_discard:
args--;
case INDEX_op_end:
for(i = 0; i < nb_oargs; i++) {
goto do_not_remove;
#ifdef CONFIG_PROFILER
s->del_op_count++;
for(i = 0; i < nb_oargs; i++) {
dead_iargs = 0;
for(i = 0; i < nb_iargs; i++) {
op_index--;
tcg_abort();
int nb_ops;
#ifndef NDEBUG
for(i = 0; i < s->nb_temps; i++) {
case TEMP_VAL_REG:
case TEMP_VAL_MEM:
case TEMP_VAL_CONST:
case TEMP_VAL_DEAD:
for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
if (s->reg_to_temp[i] >= 0) {
int reg, k;
goto fail;
for(k = 0; k < s->nb_temps; k++) {
fail:
dump_regs(s);
tcg_abort();
s->current_frame_offset = (s->current_frame_offset + sizeof(tcg_target_long) - 1) & ~(sizeof(tcg_target_long) - 1);
#ifndef VBOX
tcg_abort();
int temp;
int i, reg;
return reg;
return reg;
tcg_abort();
int reg;
case TEMP_VAL_REG:
case TEMP_VAL_DEAD:
case TEMP_VAL_CONST:
case TEMP_VAL_MEM:
tcg_abort();
for(i = 0; i < s->nb_globals; i++) {
unsigned int dead_iargs)
int reg;
tcg_abort();
unsigned int dead_iargs)
for(k = 0; k < nb_iargs; k++) {
goto iarg_end;
goto allocate_in_reg;
goto allocate_in_reg;
const_args[i] = 0;
iarg_end: ;
for(i = 0; i < nb_iargs; i++) {
if (IS_DEAD_IARG(i)) {
for(k = 0; k < nb_oargs; k++) {
goto oarg_end;
for(i = 0; i < nb_oargs; i++) {
#ifdef TCG_TARGET_STACK_GROWSUP
#define STACK_DIR(x) (-(x))
#define STACK_DIR(x) (x)
unsigned int dead_iargs)
if (allocate_args) {
#ifdef TCG_TARGET_STACK_GROWSUP
s->reserved_regs);
s->reserved_regs);
tcg_abort();
#ifndef TCG_TARGET_STACK_GROWSUP
for(i = 0; i < nb_regs; i++) {
tcg_abort();
const_func_arg = 0;
tcg_abort();
for(i = 0; i < nb_iargs; i++) {
if (IS_DEAD_IARG(i)) {
if (allocate_args) {
for(i = 0; i < nb_oargs; i++) {
#ifdef CONFIG_PROFILER
static void dump_op_count(void)
FILE *f;
fclose(f);
int op_index;
unsigned int dead_iargs;
#ifdef DEBUG_DISAS
#ifdef CONFIG_PROFILER
#ifdef CONFIG_PROFILER
#ifdef DEBUG_DISAS
op_index = 0;
#ifdef CONFIG_PROFILER
switch(opc) {
case INDEX_op_mov_i32:
case INDEX_op_mov_i64:
case INDEX_op_movi_i32:
case INDEX_op_movi_i64:
case INDEX_op_nop:
case INDEX_op_nop1:
case INDEX_op_nop2:
case INDEX_op_nop3:
case INDEX_op_nopn:
goto next;
case INDEX_op_discard:
case INDEX_op_set_label:
case INDEX_op_call:
goto next;
case INDEX_op_end:
goto the_end;
next:
return op_index;
op_index++;
#ifndef NDEBUG
check_regs(s);
#ifdef CONFIG_PROFILER
s->op_count += n;
if (n > s->op_count_max)
s->op_count_max = n;
#ifdef CONFIG_PROFILER
s->tb_count,
s->tb_count ?
s->tb_count ?
s->temp_count_max);
if (tot == 0)
s->restore_count);