cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsyncCorrectness issues:
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- some eflags manipulation incorrectly reset the bit 0x2.
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- SVM: test, cpu save/restore, SMM save/restore.
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- x86_64: lcall/ljmp intel/amd differences ?
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- better code fetch (different exception handling + CS.limit support)
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- user/kernel PUSHL/POPL in helper.c
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- add missing cpuid tests
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- return UD exception if LOCK prefix incorrectly used
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- test ldt limit < 7 ?
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- full support of segment limit/rights
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- full x87 exception support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- improve x87 bit exactness (use bochs code ?)
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- DRx register support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- CR0.AC emulation
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- SSE alignment checks
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- fix SSE min/max with nans
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsyncOptimizations/Features:
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- add SVM nested paging support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- add VMX support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- add AVX support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- add SSE5 support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- fxsave/fxrstor AMD extensions
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- improve monitor/mwait support
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- faster EFLAGS update: consider SZAP, C, O can be updated separately
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync with a bit field in CC_OP and more state variables.
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- evaluate x87 stack pointer statically
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync- find a way to avoid translating several time the same TB if CR0.TS
cec22f4b94382f5ebee9d2f6b6df672689681e07vboxsync is set or not.