#include "config.h"

#ifndef VBOX

#ifdef _WIN32

#include <windows.h>

#else

#include <sys/types.h>

#include <sys/mman.h>

#endif

#include <stdlib.h>

#include <stdio.h>

#include <stdarg.h>

#include <string.h>

#include <errno.h>

#include <unistd.h>

#include <inttypes.h>

#else /* VBOX */

# include <stdlib.h>

# include <stdio.h>

# include <iprt/alloc.h>

# include <iprt/string.h>

# include <iprt/param.h>

# include <VBox/vmm/pgm.h> /* PGM_DYNAMIC_RAM_ALLOC */

#endif /* VBOX */

#include "cpu.h"

#include "exec-all.h"

#if defined(CONFIG_USER_ONLY)

#include <qemu.h>

#endif

#if !defined(CONFIG_USER_ONLY)

#undef DEBUG_TB_CHECK

#endif

#define SMC_BITMAP_USE_THRESHOLD 10

#define MMAP_AREA_START 0x00000000

#define MMAP_AREA_END 0xa8000000

#if defined(TARGET_SPARC64)

#define TARGET_PHYS_ADDR_SPACE_BITS 41

#elif defined(TARGET_SPARC)

#define TARGET_PHYS_ADDR_SPACE_BITS 36

#elif defined(TARGET_ALPHA)

#define TARGET_PHYS_ADDR_SPACE_BITS 42

#define TARGET_VIRT_ADDR_SPACE_BITS 42

#elif defined(TARGET_PPC64)

#define TARGET_PHYS_ADDR_SPACE_BITS 42

#elif defined(TARGET_X86_64) && !defined(USE_KQEMU)

#define TARGET_PHYS_ADDR_SPACE_BITS 42

#elif defined(TARGET_I386) && !defined(USE_KQEMU)

#define TARGET_PHYS_ADDR_SPACE_BITS 36

#else

#define TARGET_PHYS_ADDR_SPACE_BITS 32

#endif

static TranslationBlock *tbs;

int code_gen_max_blocks;

TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];

static int nb_tbs;

spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;

#ifndef VBOX

#if defined(__arm__) || defined(__sparc_v9__)

#define code_gen_section \

__attribute__((__section__(".gen_code"))) \

__attribute__((aligned (32)))

#else

#define code_gen_section \

__attribute__((aligned (32)))

#endif

uint8_t code_gen_prologue[1024] code_gen_section;

#else /* VBOX */

extern uint8_t* code_gen_prologue;

#endif /* VBOX */

static uint8_t *code_gen_buffer;

static unsigned long code_gen_buffer_size;

static unsigned long code_gen_buffer_max_size;

uint8_t *code_gen_ptr;

#ifndef VBOX

#if !defined(CONFIG_USER_ONLY)

ram_addr_t phys_ram_size;

int phys_ram_fd;

uint8_t *phys_ram_base;

uint8_t *phys_ram_dirty;

static int in_migration;

static ram_addr_t phys_ram_alloc_offset = 0;

#endif

#else /* VBOX */

RTGCPHYS phys_ram_size;

RTGCPHYS phys_ram_dirty_size;

#endif /* VBOX */

#if !defined(VBOX)

uint8_t *phys_ram_base;

#endif

uint8_t *phys_ram_dirty;

CPUState *first_cpu;

CPUState *cpu_single_env;

int use_icount = 0;

int64_t qemu_icount;

typedef struct PageDesc {

/* list of TBs intersecting this ram page */

TranslationBlock *first_tb;

/* in order to optimize self modifying code, we count the number

unsigned int code_write_count;

uint8_t *code_bitmap;

#if defined(CONFIG_USER_ONLY)

unsigned long flags;

#endif

} PageDesc;

typedef struct PhysPageDesc {

/* offset in host memory of the page + io_index in the low 12 bits */

ram_addr_t phys_offset;

} PhysPageDesc;

#define L2_BITS 10

#if defined(CONFIG_USER_ONLY) && defined(TARGET_VIRT_ADDR_SPACE_BITS)

#define L1_BITS (TARGET_VIRT_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS)

#else

#define L1_BITS (32 - L2_BITS - TARGET_PAGE_BITS)

#endif

#ifdef VBOX

#define L0_BITS (TARGET_PHYS_ADDR_SPACE_BITS - 32)

#endif

#ifdef VBOX

#define L0_SIZE (1 << L0_BITS)

#endif

#define L1_SIZE (1 << L1_BITS)

#define L2_SIZE (1 << L2_BITS)

static void io_mem_init(void);

unsigned long qemu_real_host_page_size;

unsigned long qemu_host_page_bits;

unsigned long qemu_host_page_size;

unsigned long qemu_host_page_mask;

#ifndef VBOX

static PageDesc *l1_map[L1_SIZE];

static PhysPageDesc **l1_phys_map;

#else

static unsigned l0_map_max_used = 0;

static PageDesc **l0_map[L0_SIZE];

static void **l0_phys_map[L0_SIZE];

#endif

#if !defined(CONFIG_USER_ONLY)

static void io_mem_init(void);

CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];

CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];

void *io_mem_opaque[IO_MEM_NB_ENTRIES];

static int io_mem_nb;

static int io_mem_watch;

#endif

#ifndef VBOX

static const char *logfilename = "/tmp/qemu.log";

#endif /* !VBOX */

FILE *logfile;

int loglevel;

#ifndef VBOX

static int log_append = 0;

#endif

#ifndef VBOX

static int tlb_flush_count;

static int tb_flush_count;

static int tb_phys_invalidate_count;

#else /* VBOX - Resettable U32 stats, see VBoxRecompiler.c. */

uint32_t tlb_flush_count;

uint32_t tb_flush_count;

uint32_t tb_phys_invalidate_count;

#endif /* VBOX */

#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)

typedef struct subpage_t {

target_phys_addr_t base;

CPUReadMemoryFunc **mem_read[TARGET_PAGE_SIZE][4];

CPUWriteMemoryFunc **mem_write[TARGET_PAGE_SIZE][4];

void *opaque[TARGET_PAGE_SIZE][2][4];

} subpage_t;

#ifndef VBOX

#ifdef _WIN32

static void map_exec(void *addr, long size)

{

DWORD old_protect;

VirtualProtect(addr, size,

PAGE_EXECUTE_READWRITE, &old_protect);

}

#else

static void map_exec(void *addr, long size)

{

unsigned long start, end, page_size;

page_size = getpagesize();

start = (unsigned long)addr;

start &= ~(page_size - 1);

end = (unsigned long)addr + size;

end += page_size - 1;

end &= ~(page_size - 1);

mprotect((void *)start, end - start,

PROT_READ | PROT_WRITE | PROT_EXEC);

}

#endif

#else // VBOX

static void map_exec(void *addr, long size)

{

RTMemProtect(addr, size,

RTMEM_PROT_EXEC | RTMEM_PROT_READ | RTMEM_PROT_WRITE);

}

#endif

static void page_init(void)

{

/* NOTE: we can always suppose that qemu_host_page_size >=

#ifdef VBOX

RTMemProtect(code_gen_buffer, sizeof(code_gen_buffer),

RTMEM_PROT_EXEC | RTMEM_PROT_READ | RTMEM_PROT_WRITE);

qemu_real_host_page_size = PAGE_SIZE;

#else /* !VBOX */

#ifdef _WIN32

{

SYSTEM_INFO system_info;

DWORD old_protect;

GetSystemInfo(&system_info);

qemu_real_host_page_size = system_info.dwPageSize;

}

#else

qemu_real_host_page_size = getpagesize();

#endif

#endif /* !VBOX */

if (qemu_host_page_size == 0)

qemu_host_page_size = qemu_real_host_page_size;

if (qemu_host_page_size < TARGET_PAGE_SIZE)

qemu_host_page_size = TARGET_PAGE_SIZE;

qemu_host_page_bits = 0;

#ifndef VBOX

while ((1 << qemu_host_page_bits) < qemu_host_page_size)

#else

while ((1 << qemu_host_page_bits) < (int)qemu_host_page_size)

#endif

qemu_host_page_bits++;

qemu_host_page_mask = ~(qemu_host_page_size - 1);

#ifndef VBOX

l1_phys_map = qemu_vmalloc(L1_SIZE * sizeof(void *));

memset(l1_phys_map, 0, L1_SIZE * sizeof(void *));

#endif

#ifdef VBOX

/* We use other means to set reserved bit on our pages */

#else

#if !defined(_WIN32) && defined(CONFIG_USER_ONLY)

{

long long startaddr, endaddr;

FILE *f;

int n;

mmap_lock();

last_brk = (unsigned long)sbrk(0);

f = fopen("/proc/self/maps", "r");

if (f) {

do {

n = fscanf (f, "%llx-%llx %*[^\n]\n", &startaddr, &endaddr);

if (n == 2) {

startaddr = MIN(startaddr,

(1ULL << TARGET_PHYS_ADDR_SPACE_BITS) - 1);

endaddr = MIN(endaddr,

(1ULL << TARGET_PHYS_ADDR_SPACE_BITS) - 1);

page_set_flags(startaddr & TARGET_PAGE_MASK,

TARGET_PAGE_ALIGN(endaddr),

PAGE_RESERVED);

}

} while (!feof(f));

fclose(f);

}

mmap_unlock();

}

#endif

#endif

}

#ifndef VBOX

static inline PageDesc **page_l1_map(target_ulong index)

#else

DECLINLINE(PageDesc **) page_l1_map(target_ulong index)

#endif

{

#ifndef VBOX

#if TARGET_LONG_BITS > 32

/* Host memory outside guest VM. For 32-bit targets we have already

if (index > ((target_ulong)L2_SIZE * L1_SIZE))

return NULL;

#endif

return &l1_map[index >> L2_BITS];

#else /* VBOX */

PageDesc **l1_map;

AssertMsgReturn(index < (target_ulong)L2_SIZE * L1_SIZE * L0_SIZE,

("index=%RGp >= %RGp; L1_SIZE=%#x L2_SIZE=%#x L0_SIZE=%#x\n",

(RTGCPHYS)index, (RTGCPHYS)L2_SIZE * L1_SIZE, L1_SIZE, L2_SIZE, L0_SIZE),

NULL);

l1_map = l0_map[index >> (L1_BITS + L2_BITS)];

if (RT_UNLIKELY(!l1_map))

{

unsigned i0 = index >> (L1_BITS + L2_BITS);

l0_map[i0] = l1_map = qemu_mallocz(sizeof(PageDesc *) * L1_SIZE);

if (RT_UNLIKELY(!l1_map))

return NULL;

if (i0 >= l0_map_max_used)

l0_map_max_used = i0 + 1;

}

return &l1_map[(index >> L2_BITS) & (L1_SIZE - 1)];

#endif /* VBOX */

}

#ifndef VBOX

static inline PageDesc *page_find_alloc(target_ulong index)

#else

DECLINLINE(PageDesc *) page_find_alloc(target_ulong index)

#endif

{

PageDesc **lp, *p;

lp = page_l1_map(index);

if (!lp)

return NULL;

p = *lp;

if (!p) {

/* allocate if not found */

#if defined(CONFIG_USER_ONLY)

unsigned long addr;

size_t len = sizeof(PageDesc) * L2_SIZE;

/* Don't use qemu_malloc because it may recurse. */

p = mmap(0, len, PROT_READ | PROT_WRITE,

MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);

*lp = p;

addr = h2g(p);

if (addr == (target_ulong)addr) {

page_set_flags(addr & TARGET_PAGE_MASK,

TARGET_PAGE_ALIGN(addr + len),

PAGE_RESERVED);

}

#else

p = qemu_mallocz(sizeof(PageDesc) * L2_SIZE);

*lp = p;

#endif

}

return p + (index & (L2_SIZE - 1));

}

#ifndef VBOX

static inline PageDesc *page_find(target_ulong index)

#else

DECLINLINE(PageDesc *) page_find(target_ulong index)

#endif

{

PageDesc **lp, *p;

lp = page_l1_map(index);

if (!lp)

return NULL;

p = *lp;

if (!p)

return 0;

return p + (index & (L2_SIZE - 1));

}

static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc)

{

void **lp, **p;

PhysPageDesc *pd;

#ifndef VBOX

p = (void **)l1_phys_map;

#if TARGET_PHYS_ADDR_SPACE_BITS > 32

#if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS)

#error unsupported TARGET_PHYS_ADDR_SPACE_BITS

#endif

lp = p + ((index >> (L1_BITS + L2_BITS)) & (L1_SIZE - 1));

p = *lp;

if (!p) {

/* allocate if not found */

if (!alloc)

return NULL;

p = qemu_vmalloc(sizeof(void *) * L1_SIZE);

memset(p, 0, sizeof(void *) * L1_SIZE);

*lp = p;

}

#endif

#else /* VBOX */

/* level 0 lookup and lazy allocation of level 1 map. */

if (RT_UNLIKELY(index >= (target_phys_addr_t)L2_SIZE * L1_SIZE * L0_SIZE))

return NULL;

p = l0_phys_map[index >> (L1_BITS + L2_BITS)];

if (RT_UNLIKELY(!p)) {

if (!alloc)

return NULL;

p = qemu_vmalloc(sizeof(void **) * L1_SIZE);

memset(p, 0, sizeof(void **) * L1_SIZE);

l0_phys_map[index >> (L1_BITS + L2_BITS)] = p;

}

/* level 1 lookup and lazy allocation of level 2 map. */

#endif /* VBOX */

lp = p + ((index >> L2_BITS) & (L1_SIZE - 1));

pd = *lp;

if (!pd) {

int i;

/* allocate if not found */

if (!alloc)

return NULL;

pd = qemu_vmalloc(sizeof(PhysPageDesc) * L2_SIZE);

*lp = pd;

for (i = 0; i < L2_SIZE; i++)

pd[i].phys_offset = IO_MEM_UNASSIGNED;

}

return ((PhysPageDesc *)pd) + (index & (L2_SIZE - 1));

}

#ifndef VBOX

static inline PhysPageDesc *phys_page_find(target_phys_addr_t index)

#else

DECLINLINE(PhysPageDesc *) phys_page_find(target_phys_addr_t index)

#endif

{

return phys_page_find_alloc(index, 0);

}

#if !defined(CONFIG_USER_ONLY)

static void tlb_protect_code(ram_addr_t ram_addr);

static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr,

target_ulong vaddr);

#define mmap_lock() do { } while(0)

#define mmap_unlock() do { } while(0)

#endif

#ifdef VBOX

#define DEFAULT_CODE_GEN_BUFFER_SIZE (8 * 1024 * 1024)

#else

#define DEFAULT_CODE_GEN_BUFFER_SIZE (32 * 1024 * 1024)

#endif

#if defined(CONFIG_USER_ONLY)

#define USE_STATIC_CODE_GEN_BUFFER

#endif

#ifndef VBOX

#ifdef USE_STATIC_CODE_GEN_BUFFER

static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE];

#endif

#endif

static void code_gen_alloc(unsigned long tb_size)

{

#ifdef USE_STATIC_CODE_GEN_BUFFER

code_gen_buffer = static_code_gen_buffer;

code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE;

map_exec(code_gen_buffer, code_gen_buffer_size);

#else

#ifdef VBOX

/* We cannot use phys_ram_size here, as it's 0 now,

code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE;

#else

code_gen_buffer_size = tb_size;

if (code_gen_buffer_size == 0) {

#if defined(CONFIG_USER_ONLY)

/* in user mode, phys_ram_size is not meaningful */

code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE;

#else

/* XXX: needs adjustments */

code_gen_buffer_size = (unsigned long)(phys_ram_size / 4);

#endif

}

if (code_gen_buffer_size < MIN_CODE_GEN_BUFFER_SIZE)

code_gen_buffer_size = MIN_CODE_GEN_BUFFER_SIZE;

#endif /* VBOX */

/* The code gen buffer location may have constraints depending on

#ifdef VBOX

code_gen_buffer = RTMemExecAlloc(code_gen_buffer_size);

if (!code_gen_buffer) {

LogRel(("REM: failed allocate codegen buffer %lld\n",

code_gen_buffer_size));

return;

}

#else //!VBOX

#if defined(__linux__)

{

int flags;

void *start = NULL;

flags = MAP_PRIVATE | MAP_ANONYMOUS;

#if defined(__x86_64__)

flags |= MAP_32BIT;

/* Cannot map more than that */

if (code_gen_buffer_size > (800 * 1024 * 1024))

code_gen_buffer_size = (800 * 1024 * 1024);

#elif defined(__sparc_v9__)

// Map the buffer below 2G, so we can use direct calls and branches

flags |= MAP_FIXED;

start = (void *) 0x60000000UL;

if (code_gen_buffer_size > (512 * 1024 * 1024))

code_gen_buffer_size = (512 * 1024 * 1024);

#endif

code_gen_buffer = mmap(start, code_gen_buffer_size,

PROT_WRITE | PROT_READ | PROT_EXEC,

flags, -1, 0);

if (code_gen_buffer == MAP_FAILED) {

fprintf(stderr, "Could not allocate dynamic translator buffer\n");

exit(1);

}

}

#elif defined(__FreeBSD__)

{

int flags;

void *addr = NULL;

flags = MAP_PRIVATE | MAP_ANONYMOUS;

#if defined(__x86_64__)

/* FreeBSD doesn't have MAP_32BIT, use MAP_FIXED and assume

flags |= MAP_FIXED;

addr = (void *)0x40000000;

/* Cannot map more than that */

if (code_gen_buffer_size > (800 * 1024 * 1024))

code_gen_buffer_size = (800 * 1024 * 1024);

#endif

code_gen_buffer = mmap(addr, code_gen_buffer_size,

PROT_WRITE | PROT_READ | PROT_EXEC,

flags, -1, 0);

if (code_gen_buffer == MAP_FAILED) {

fprintf(stderr, "Could not allocate dynamic translator buffer\n");

exit(1);

}

}

#else

code_gen_buffer = qemu_malloc(code_gen_buffer_size);

if (!code_gen_buffer) {

fprintf(stderr, "Could not allocate dynamic translator buffer\n");

exit(1);

}

map_exec(code_gen_buffer, code_gen_buffer_size);

#endif

map_exec(code_gen_prologue, sizeof(code_gen_prologue));

#endif /* !VBOX */

#endif /* !USE_STATIC_CODE_GEN_BUFFER */

#ifndef VBOX

map_exec(code_gen_prologue, sizeof(code_gen_prologue));

#else

map_exec(code_gen_prologue, _1K);

#endif

code_gen_buffer_max_size = code_gen_buffer_size -

code_gen_max_block_size();

code_gen_max_blocks = code_gen_buffer_size / CODE_GEN_AVG_BLOCK_SIZE;

tbs = qemu_malloc(code_gen_max_blocks * sizeof(TranslationBlock));

}

void cpu_exec_init_all(unsigned long tb_size)

{

cpu_gen_init();

code_gen_alloc(tb_size);

code_gen_ptr = code_gen_buffer;

page_init();

#if !defined(CONFIG_USER_ONLY)

io_mem_init();

#endif

}

#ifndef VBOX

#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)

#define CPU_COMMON_SAVE_VERSION 1

static void cpu_common_save(QEMUFile *f, void *opaque)

{

CPUState *env = opaque;

qemu_put_be32s(f, &env->halted);

qemu_put_be32s(f, &env->interrupt_request);

}

static int cpu_common_load(QEMUFile *f, void *opaque, int version_id)

{

CPUState *env = opaque;

if (version_id != CPU_COMMON_SAVE_VERSION)

return -EINVAL;

qemu_get_be32s(f, &env->halted);

qemu_get_be32s(f, &env->interrupt_request);

tlb_flush(env, 1);

return 0;

}

#endif

#endif //!VBOX

void cpu_exec_init(CPUState *env)

{

CPUState **penv;

int cpu_index;

env->next_cpu = NULL;

penv = &first_cpu;

cpu_index = 0;

while (*penv != NULL) {

penv = (CPUState **)&(*penv)->next_cpu;

cpu_index++;

}

env->cpu_index = cpu_index;

env->nb_watchpoints = 0;

*penv = env;

#ifndef VBOX

#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)

register_savevm("cpu_common", cpu_index, CPU_COMMON_SAVE_VERSION,

cpu_common_save, cpu_common_load, env);

register_savevm("cpu", cpu_index, CPU_SAVE_VERSION,

cpu_save, cpu_load, env);

#endif

#endif // !VBOX

}

#ifndef VBOX

static inline void invalidate_page_bitmap(PageDesc *p)

#else

DECLINLINE(void) invalidate_page_bitmap(PageDesc *p)

#endif

{

if (p->code_bitmap) {

qemu_free(p->code_bitmap);

p->code_bitmap = NULL;

}

p->code_write_count = 0;

}

static void page_flush_tb(void)

{

int i, j;

PageDesc *p;

#ifdef VBOX

int k;

#endif

#ifdef VBOX

k = l0_map_max_used;

while (k-- > 0) {

PageDesc **l1_map = l0_map[k];

if (l1_map) {

#endif

for(i = 0; i < L1_SIZE; i++) {

p = l1_map[i];

if (p) {

for(j = 0; j < L2_SIZE; j++) {

p->first_tb = NULL;

invalidate_page_bitmap(p);

p++;

}

}

}

#ifdef VBOX

}

}

#endif

}

void tb_flush(CPUState *env1)

{

CPUState *env;

#ifdef VBOX

STAM_PROFILE_START(&env1->StatTbFlush, a);

#endif

#if defined(DEBUG_FLUSH)

printf("qemu: flush code_size=%ld nb_tbs=%d avg_tb_size=%ld\n",

(unsigned long)(code_gen_ptr - code_gen_buffer),

nb_tbs, nb_tbs > 0 ?

((unsigned long)(code_gen_ptr - code_gen_buffer)) / nb_tbs : 0);

#endif

if ((unsigned long)(code_gen_ptr - code_gen_buffer) > code_gen_buffer_size)

cpu_abort(env1, "Internal error: code buffer overflow\n");

nb_tbs = 0;

for(env = first_cpu; env != NULL; env = env->next_cpu) {

memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));

}

memset (tb_phys_hash, 0, CODE_GEN_PHYS_HASH_SIZE * sizeof (void *));

page_flush_tb();

code_gen_ptr = code_gen_buffer;

/* XXX: flush processor icache at this point if cache flush is

tb_flush_count++;

#ifdef VBOX

STAM_PROFILE_STOP(&env1->StatTbFlush, a);

#endif

}

#ifdef DEBUG_TB_CHECK

static void tb_invalidate_check(target_ulong address)

{

TranslationBlock *tb;

int i;

address &= TARGET_PAGE_MASK;

for(i = 0;i < CODE_GEN_PHYS_HASH_SIZE; i++) {

for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {

if (!(address + TARGET_PAGE_SIZE <= tb->pc ||

address >= tb->pc + tb->size)) {

printf("ERROR invalidate: address=%08lx PC=%08lx size=%04x\n",

address, (long)tb->pc, tb->size);

}

}

}

}

static void tb_page_check(void)

{

TranslationBlock *tb;

int i, flags1, flags2;

for(i = 0;i < CODE_GEN_PHYS_HASH_SIZE; i++) {

for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {

flags1 = page_get_flags(tb->pc);

flags2 = page_get_flags(tb->pc + tb->size - 1);

if ((flags1 & PAGE_WRITE) || (flags2 & PAGE_WRITE)) {

printf("ERROR page flags: PC=%08lx size=%04x f1=%x f2=%x\n",

(long)tb->pc, tb->size, flags1, flags2);

}

}

}

}

static void tb_jmp_check(TranslationBlock *tb)

{

TranslationBlock *tb1;

unsigned int n1;

/* suppress any remaining jumps to this TB */

tb1 = tb->jmp_first;

for(;;) {

n1 = (long)tb1 & 3;

tb1 = (TranslationBlock *)((long)tb1 & ~3);

if (n1 == 2)

break;

tb1 = tb1->jmp_next[n1];

}

/* check end of list */

if (tb1 != tb) {

printf("ERROR: jmp_list from 0x%08lx\n", (long)tb);

}

}

#endif // DEBUG_TB_CHECK

#ifndef VBOX

static inline void tb_remove(TranslationBlock **ptb, TranslationBlock *tb,

int next_offset)

#else

DECLINLINE(void) tb_remove(TranslationBlock **ptb, TranslationBlock *tb,

int next_offset)

#endif

{

TranslationBlock *tb1;

for(;;) {

tb1 = *ptb;

if (tb1 == tb) {

*ptb = *(TranslationBlock **)((char *)tb1 + next_offset);

break;

}

ptb = (TranslationBlock **)((char *)tb1 + next_offset);

}

}

#ifndef VBOX

static inline void tb_page_remove(TranslationBlock **ptb, TranslationBlock *tb)

#else

DECLINLINE(void) tb_page_remove(TranslationBlock **ptb, TranslationBlock *tb)

#endif

{

TranslationBlock *tb1;

unsigned int n1;

for(;;) {

tb1 = *ptb;

n1 = (long)tb1 & 3;

tb1 = (TranslationBlock *)((long)tb1 & ~3);

if (tb1 == tb) {

*ptb = tb1->page_next[n1];

break;

}

ptb = &tb1->page_next[n1];

}

}

#ifndef VBOX

static inline void tb_jmp_remove(TranslationBlock *tb, int n)

#else

DECLINLINE(void) tb_jmp_remove(TranslationBlock *tb, int n)

#endif

{

TranslationBlock *tb1, **ptb;

unsigned int n1;

ptb = &tb->jmp_next[n];

tb1 = *ptb;

if (tb1) {

/* find tb(n) in circular list */

for(;;) {

tb1 = *ptb;

n1 = (long)tb1 & 3;

tb1 = (TranslationBlock *)((long)tb1 & ~3);

if (n1 == n && tb1 == tb)

break;

if (n1 == 2) {

ptb = &tb1->jmp_first;

} else {

ptb = &tb1->jmp_next[n1];

}

}

/* now we can suppress tb(n) from the list */

*ptb = tb->jmp_next[n];

tb->jmp_next[n] = NULL;

}

}

#ifndef VBOX

static inline void tb_reset_jump(TranslationBlock *tb, int n)

#else

DECLINLINE(void) tb_reset_jump(TranslationBlock *tb, int n)

#endif

{

tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));

}

void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr)

{

CPUState *env;

PageDesc *p;

unsigned int h, n1;

target_phys_addr_t phys_pc;

TranslationBlock *tb1, *tb2;

/* remove the TB from the hash list */

phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);

h = tb_phys_hash_func(phys_pc);

tb_remove(&tb_phys_hash[h], tb,

offsetof(TranslationBlock, phys_hash_next));

/* remove the TB from the page list */

if (tb->page_addr[0] != page_addr) {

p = page_find(tb->page_addr[0] >> TARGET_PAGE_BITS);

tb_page_remove(&p->first_tb, tb);

invalidate_page_bitmap(p);

}

if (tb->page_addr[1] != -1 && tb->page_addr[1] != page_addr) {

p = page_find(tb->page_addr[1] >> TARGET_PAGE_BITS);

tb_page_remove(&p->first_tb, tb);

invalidate_page_bitmap(p);

}

tb_invalidated_flag = 1;

/* remove the TB from the hash list */

h = tb_jmp_cache_hash_func(tb->pc);

for(env = first_cpu; env != NULL; env = env->next_cpu) {

if (env->tb_jmp_cache[h] == tb)

env->tb_jmp_cache[h] = NULL;

}

/* suppress this TB from the two jump lists */

tb_jmp_remove(tb, 0);

tb_jmp_remove(tb, 1);

/* suppress any remaining jumps to this TB */

tb1 = tb->jmp_first;

for(;;) {

n1 = (long)tb1 & 3;

if (n1 == 2)

break;

tb1 = (TranslationBlock *)((long)tb1 & ~3);

tb2 = tb1->jmp_next[n1];

tb_reset_jump(tb1, n1);

tb1->jmp_next[n1] = NULL;

tb1 = tb2;

}

tb->jmp_first = (TranslationBlock *)((long)tb | 2); /* fail safe */

tb_phys_invalidate_count++;

}

#ifdef VBOX

void tb_invalidate_virt(CPUState *env, uint32_t eip)

{

# if 1

tb_flush(env);

# else

uint8_t *cs_base, *pc;

unsigned int flags, h, phys_pc;

TranslationBlock *tb, **ptb;

flags = env->hflags;

flags |= (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK));

cs_base = env->segs[R_CS].base;

pc = cs_base + eip;

tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base,

flags);

if(tb)

{

# ifdef DEBUG

printf("invalidating TB (%08X) at %08X\n", tb, eip);

# endif

tb_invalidate(tb);

//Note: this will leak TBs, but the whole cache will be flushed

// when it happens too often

tb->pc = 0;

tb->cs_base = 0;

tb->flags = 0;

}

# endif

}

# ifdef VBOX_STRICT

unsigned long get_phys_page_offset(target_ulong addr)

{

PhysPageDesc *p = phys_page_find(addr >> TARGET_PAGE_BITS);

return p ? p->phys_offset : 0;

}

# endif /* VBOX_STRICT */

#endif /* VBOX */

#ifndef VBOX

static inline void set_bits(uint8_t *tab, int start, int len)

#else

DECLINLINE(void) set_bits(uint8_t *tab, int start, int len)

#endif

{

int end, mask, end1;

end = start + len;

tab += start >> 3;

mask = 0xff << (start & 7);

if ((start & ~7) == (end & ~7)) {

if (start < end) {

mask &= ~(0xff << (end & 7));

*tab |= mask;

}

} else {

*tab++ |= mask;

start = (start + 8) & ~7;

end1 = end & ~7;

while (start < end1) {

*tab++ = 0xff;

start += 8;

}

if (start < end) {

mask = ~(0xff << (end & 7));

*tab |= mask;

}

}

}

static void build_page_bitmap(PageDesc *p)

{

int n, tb_start, tb_end;

TranslationBlock *tb;

p->code_bitmap = qemu_malloc(TARGET_PAGE_SIZE / 8);

if (!p->code_bitmap)

return;

memset(p->code_bitmap, 0, TARGET_PAGE_SIZE / 8);

tb = p->first_tb;

while (tb != NULL) {

n = (long)tb & 3;

tb = (TranslationBlock *)((long)tb & ~3);

/* NOTE: this is subtle as a TB may span two physical pages */

if (n == 0) {

/* NOTE: tb_end may be after the end of the page, but

tb_start = tb->pc & ~TARGET_PAGE_MASK;

tb_end = tb_start + tb->size;

if (tb_end > TARGET_PAGE_SIZE)

tb_end = TARGET_PAGE_SIZE;

} else {

tb_start = 0;

tb_end = ((tb->pc + tb->size) & ~TARGET_PAGE_MASK);

}

set_bits(p->code_bitmap, tb_start, tb_end - tb_start);

tb = tb->page_next[n];

}

}

TranslationBlock *tb_gen_code(CPUState *env,

target_ulong pc, target_ulong cs_base,

int flags, int cflags)

{

TranslationBlock *tb;

uint8_t *tc_ptr;

target_ulong phys_pc, phys_page2, virt_page2;

int code_gen_size;

phys_pc = get_phys_addr_code(env, pc);

tb = tb_alloc(pc);

if (!tb) {

/* flush must be done */

tb_flush(env);

/* cannot fail at this point */

tb = tb_alloc(pc);

/* Don't forget to invalidate previous TB info. */

tb_invalidated_flag = 1;

}

tc_ptr = code_gen_ptr;

tb->tc_ptr = tc_ptr;

tb->cs_base = cs_base;

tb->flags = flags;

tb->cflags = cflags;

cpu_gen_code(env, tb, &code_gen_size);

code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));

/* check next page if needed */

virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;

phys_page2 = -1;

if ((pc & TARGET_PAGE_MASK) != virt_page2) {

phys_page2 = get_phys_addr_code(env, virt_page2);

}

tb_link_phys(tb, phys_pc, phys_page2);

return tb;

}

void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,

int is_cpu_write_access)

{

int n, current_tb_modified, current_tb_not_found, current_flags;

CPUState *env = cpu_single_env;

PageDesc *p;

TranslationBlock *tb, *tb_next, *current_tb, *saved_tb;

target_ulong tb_start, tb_end;

target_ulong current_pc, current_cs_base;

p = page_find(start >> TARGET_PAGE_BITS);

if (!p)

return;

if (!p->code_bitmap &&

++p->code_write_count >= SMC_BITMAP_USE_THRESHOLD &&

is_cpu_write_access) {

/* build code bitmap */

build_page_bitmap(p);

}

/* we remove all the TBs in the range [start, end[ */

/* XXX: see if in some cases it could be faster to invalidate all the code */

current_tb_not_found = is_cpu_write_access;

current_tb_modified = 0;

current_tb = NULL; /* avoid warning */

current_pc = 0; /* avoid warning */

current_cs_base = 0; /* avoid warning */

current_flags = 0; /* avoid warning */

tb = p->first_tb;

while (tb != NULL) {

n = (long)tb & 3;

tb = (TranslationBlock *)((long)tb & ~3);

tb_next = tb->page_next[n];

/* NOTE: this is subtle as a TB may span two physical pages */

if (n == 0) {

/* NOTE: tb_end may be after the end of the page, but

tb_start = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);

tb_end = tb_start + tb->size;

} else {

tb_start = tb->page_addr[1];

tb_end = tb_start + ((tb->pc + tb->size) & ~TARGET_PAGE_MASK);

}

if (!(tb_end <= start || tb_start >= end)) {

#ifdef TARGET_HAS_PRECISE_SMC

if (current_tb_not_found) {

current_tb_not_found = 0;

current_tb = NULL;

if (env->mem_io_pc) {

/* now we have a real cpu fault */

current_tb = tb_find_pc(env->mem_io_pc);

}

}

if (current_tb == tb &&

(current_tb->cflags & CF_COUNT_MASK) != 1) {

/* If we are modifying the current TB, we must stop

current_tb_modified = 1;

cpu_restore_state(current_tb, env,

env->mem_io_pc, NULL);

#if defined(TARGET_I386)

current_flags = env->hflags;

current_flags |= (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK));

current_cs_base = (target_ulong)env->segs[R_CS].base;

current_pc = current_cs_base + env->eip;

#else

#error unsupported CPU

#endif

}

#endif /* TARGET_HAS_PRECISE_SMC */

/* we need to do that to handle the case where a signal

saved_tb = NULL;

if (env) {

saved_tb = env->current_tb;

env->current_tb = NULL;

}

tb_phys_invalidate(tb, -1);

if (env) {

env->current_tb = saved_tb;

if (env->interrupt_request && env->current_tb)

cpu_interrupt(env, env->interrupt_request);

}

}

tb = tb_next;

}

#if !defined(CONFIG_USER_ONLY)

/* if no code remaining, no need to continue to use slow writes */

if (!p->first_tb) {

invalidate_page_bitmap(p);

if (is_cpu_write_access) {

tlb_unprotect_code_phys(env, start, env->mem_io_vaddr);

}

}

#endif

#ifdef TARGET_HAS_PRECISE_SMC

if (current_tb_modified) {

/* we generate a block containing just the instruction

env->current_tb = NULL;

tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);

cpu_resume_from_signal(env, NULL);

}

#endif

}

#ifndef VBOX

static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)

#else

DECLINLINE(void) tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)

#endif

{

PageDesc *p;

int offset, b;

#if 0

if (1) {

if (loglevel) {

fprintf(logfile, "modifying code at 0x%x size=%d EIP=%x PC=%08x\n",

cpu_single_env->mem_io_vaddr, len,

cpu_single_env->eip,

cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);

}

}

#endif

p = page_find(start >> TARGET_PAGE_BITS);

if (!p)

return;

if (p->code_bitmap) {

offset = start & ~TARGET_PAGE_MASK;

b = p->code_bitmap[offset >> 3] >> (offset & 7);

if (b & ((1 << len) - 1))

goto do_invalidate;

} else {

do_invalidate:

tb_invalidate_phys_page_range(start, start + len, 1);

}

}

#if !defined(CONFIG_SOFTMMU)

static void tb_invalidate_phys_page(target_phys_addr_t addr,

unsigned long pc, void *puc)

{

int n, current_flags, current_tb_modified;

target_ulong current_pc, current_cs_base;

PageDesc *p;

TranslationBlock *tb, *current_tb;

#ifdef TARGET_HAS_PRECISE_SMC

CPUState *env = cpu_single_env;

#endif

addr &= TARGET_PAGE_MASK;

p = page_find(addr >> TARGET_PAGE_BITS);

if (!p)

return;

tb = p->first_tb;

current_tb_modified = 0;

current_tb = NULL;

current_pc = 0; /* avoid warning */

current_cs_base = 0; /* avoid warning */

current_flags = 0; /* avoid warning */

#ifdef TARGET_HAS_PRECISE_SMC

if (tb && pc != 0) {

current_tb = tb_find_pc(pc);

}

#endif

while (tb != NULL) {

n = (long)tb & 3;

tb = (TranslationBlock *)((long)tb & ~3);

#ifdef TARGET_HAS_PRECISE_SMC

if (current_tb == tb &&

(current_tb->cflags & CF_COUNT_MASK) != 1) {

/* If we are modifying the current TB, we must stop

current_tb_modified = 1;

cpu_restore_state(current_tb, env, pc, puc);

#if defined(TARGET_I386)

current_flags = env->hflags;

current_flags |= (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK));

current_cs_base = (target_ulong)env->segs[R_CS].base;

current_pc = current_cs_base + env->eip;

#else

#error unsupported CPU

#endif

}

#endif /* TARGET_HAS_PRECISE_SMC */

tb_phys_invalidate(tb, addr);

tb = tb->page_next[n];

}

p->first_tb = NULL;

#ifdef TARGET_HAS_PRECISE_SMC

if (current_tb_modified) {

/* we generate a block containing just the instruction

env->current_tb = NULL;

tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);

cpu_resume_from_signal(env, puc);

}

#endif

}

#endif

#ifndef VBOX

static inline void tb_alloc_page(TranslationBlock *tb,

unsigned int n, target_ulong page_addr)

#else

DECLINLINE(void) tb_alloc_page(TranslationBlock *tb,

unsigned int n, target_ulong page_addr)

#endif

{

PageDesc *p;

TranslationBlock *last_first_tb;

tb->page_addr[n] = page_addr;

p = page_find_alloc(page_addr >> TARGET_PAGE_BITS);

tb->page_next[n] = p->first_tb;

last_first_tb = p->first_tb;

p->first_tb = (TranslationBlock *)((long)tb | n);

invalidate_page_bitmap(p);

#if defined(TARGET_HAS_SMC) || 1

#if defined(CONFIG_USER_ONLY)

if (p->flags & PAGE_WRITE) {

target_ulong addr;

PageDesc *p2;

int prot;

/* force the host page as non writable (writes will have a

page_addr &= qemu_host_page_mask;

prot = 0;

for(addr = page_addr; addr < page_addr + qemu_host_page_size;

addr += TARGET_PAGE_SIZE) {

p2 = page_find (addr >> TARGET_PAGE_BITS);

if (!p2)

continue;

prot |= p2->flags;

p2->flags &= ~PAGE_WRITE;

page_get_flags(addr);

}

mprotect(g2h(page_addr), qemu_host_page_size,

(prot & PAGE_BITS) & ~PAGE_WRITE);

#ifdef DEBUG_TB_INVALIDATE

printf("protecting code page: 0x" TARGET_FMT_lx "\n",

page_addr);

#endif

}

#else

/* if some code is already present, then the pages are already

if (!last_first_tb) {

tlb_protect_code(page_addr);

}

#endif

#endif /* TARGET_HAS_SMC */

}

TranslationBlock *tb_alloc(target_ulong pc)

{

TranslationBlock *tb;

if (nb_tbs >= code_gen_max_blocks ||

#ifndef VBOX

(code_gen_ptr - code_gen_buffer) >= code_gen_buffer_max_size)

#else

(code_gen_ptr - code_gen_buffer) >= (int)code_gen_buffer_max_size)

#endif

return NULL;

tb = &tbs[nb_tbs++];

tb->pc = pc;

tb->cflags = 0;

return tb;

}

void tb_free(TranslationBlock *tb)

{

/* In practice this is mostly used for single use temporary TB

if (nb_tbs > 0 && tb == &tbs[nb_tbs - 1]) {

code_gen_ptr = tb->tc_ptr;

nb_tbs--;

}

}

void tb_link_phys(TranslationBlock *tb,

target_ulong phys_pc, target_ulong phys_page2)

{

unsigned int h;

TranslationBlock **ptb;

/* Grab the mmap lock to stop another thread invalidating this TB

mmap_lock();

/* add in the physical hash table */

h = tb_phys_hash_func(phys_pc);

ptb = &tb_phys_hash[h];

tb->phys_hash_next = *ptb;

*ptb = tb;

/* add in the page list */

tb_alloc_page(tb, 0, phys_pc & TARGET_PAGE_MASK);

if (phys_page2 != -1)

tb_alloc_page(tb, 1, phys_page2);

else

tb->page_addr[1] = -1;

tb->jmp_first = (TranslationBlock *)((long)tb | 2);

tb->jmp_next[0] = NULL;

tb->jmp_next[1] = NULL;

/* init original jump addresses */

if (tb->tb_next_offset[0] != 0xffff)

tb_reset_jump(tb, 0);

if (tb->tb_next_offset[1] != 0xffff)

tb_reset_jump(tb, 1);

#ifdef DEBUG_TB_CHECK

tb_page_check();

#endif

mmap_unlock();

}

TranslationBlock *tb_find_pc(unsigned long tc_ptr)

{

int m_min, m_max, m;

unsigned long v;

TranslationBlock *tb;

if (nb_tbs <= 0)

return NULL;

if (tc_ptr < (unsigned long)code_gen_buffer ||

tc_ptr >= (unsigned long)code_gen_ptr)

return NULL;

/* binary search (cf Knuth) */

m_min = 0;

m_max = nb_tbs - 1;

while (m_min <= m_max) {

m = (m_min + m_max) >> 1;

tb = &tbs[m];

v = (unsigned long)tb->tc_ptr;

if (v == tc_ptr)

return tb;

else if (tc_ptr < v) {

m_max = m - 1;

} else {

m_min = m + 1;

}

}

return &tbs[m_max];

}

static void tb_reset_jump_recursive(TranslationBlock *tb);

#ifndef VBOX

static inline void tb_reset_jump_recursive2(TranslationBlock *tb, int n)

#else

DECLINLINE(void) tb_reset_jump_recursive2(TranslationBlock *tb, int n)

#endif

{

TranslationBlock *tb1, *tb_next, **ptb;

unsigned int n1;

tb1 = tb->jmp_next[n];

if (tb1 != NULL) {

/* find head of list */

for(;;) {

n1 = (long)tb1 & 3;

tb1 = (TranslationBlock *)((long)tb1 & ~3);

if (n1 == 2)

break;

tb1 = tb1->jmp_next[n1];

}

/* we are now sure now that tb jumps to tb1 */

tb_next = tb1;

/* remove tb from the jmp_first list */

ptb = &tb_next->jmp_first;

for(;;) {

tb1 = *ptb;

n1 = (long)tb1 & 3;

tb1 = (TranslationBlock *)((long)tb1 & ~3);

if (n1 == n && tb1 == tb)

break;

ptb = &tb1->jmp_next[n1];

}

*ptb = tb->jmp_next[n];

tb->jmp_next[n] = NULL;

/* suppress the jump to next tb in generated code */

tb_reset_jump(tb, n);

/* suppress jumps in the tb on which we could have jumped */

tb_reset_jump_recursive(tb_next);

}

}

static void tb_reset_jump_recursive(TranslationBlock *tb)

{

tb_reset_jump_recursive2(tb, 0);

tb_reset_jump_recursive2(tb, 1);

}

#if defined(TARGET_HAS_ICE)

static void breakpoint_invalidate(CPUState *env, target_ulong pc)

{

target_ulong addr, pd;

ram_addr_t ram_addr;

PhysPageDesc *p;

addr = cpu_get_phys_page_debug(env, pc);

p = phys_page_find(addr >> TARGET_PAGE_BITS);

if (!p) {

pd = IO_MEM_UNASSIGNED;

} else {

pd = p->phys_offset;

}

ram_addr = (pd & TARGET_PAGE_MASK) | (pc & ~TARGET_PAGE_MASK);

tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0);

}

#endif

int cpu_watchpoint_insert(CPUState *env, target_ulong addr, int type)

{

int i;

for (i = 0; i < env->nb_watchpoints; i++) {

if (addr == env->watchpoint[i].vaddr)

return 0;

}

if (env->nb_watchpoints >= MAX_WATCHPOINTS)

return -1;

i = env->nb_watchpoints++;

env->watchpoint[i].vaddr = addr;

env->watchpoint[i].type = type;

tlb_flush_page(env, addr);

/* FIXME: This flush is needed because of the hack to make memory ops

tb_flush(env);

return i;

}

int cpu_watchpoint_remove(CPUState *env, target_ulong addr)

{

int i;

for (i = 0; i < env->nb_watchpoints; i++) {

if (addr == env->watchpoint[i].vaddr) {

env->nb_watchpoints--;

env->watchpoint[i] = env->watchpoint[env->nb_watchpoints];

tlb_flush_page(env, addr);

return 0;

}

}

return -1;

}

void cpu_watchpoint_remove_all(CPUState *env) {

int i;

for (i = 0; i < env->nb_watchpoints; i++) {

tlb_flush_page(env, env->watchpoint[i].vaddr);

}

env->nb_watchpoints = 0;

}

int cpu_breakpoint_insert(CPUState *env, target_ulong pc)

{

#if defined(TARGET_HAS_ICE)

int i;

for(i = 0; i < env->nb_breakpoints; i++) {

if (env->breakpoints[i] == pc)

return 0;

}

if (env->nb_breakpoints >= MAX_BREAKPOINTS)

return -1;

env->breakpoints[env->nb_breakpoints++] = pc;

breakpoint_invalidate(env, pc);

return 0;

#else

return -1;

#endif

}

void cpu_breakpoint_remove_all(CPUState *env) {

#if defined(TARGET_HAS_ICE)

int i;

for(i = 0; i < env->nb_breakpoints; i++) {

breakpoint_invalidate(env, env->breakpoints[i]);

}

env->nb_breakpoints = 0;

#endif

}

int cpu_breakpoint_remove(CPUState *env, target_ulong pc)

{

#if defined(TARGET_HAS_ICE)

int i;

for(i = 0; i < env->nb_breakpoints; i++) {

if (env->breakpoints[i] == pc)

goto found;

}

return -1;

found:

env->nb_breakpoints--;

if (i < env->nb_breakpoints)

env->breakpoints[i] = env->breakpoints[env->nb_breakpoints];

breakpoint_invalidate(env, pc);

return 0;

#else

return -1;

#endif

}

void cpu_single_step(CPUState *env, int enabled)

{

#if defined(TARGET_HAS_ICE)

if (env->singlestep_enabled != enabled) {

env->singlestep_enabled = enabled;

/* must flush all the translated code to avoid inconsistencies */

/* XXX: only flush what is necessary */

tb_flush(env);

}

#endif

}

#ifndef VBOX

void cpu_set_log(int log_flags)

{

loglevel = log_flags;

if (loglevel && !logfile) {

logfile = fopen(logfilename, "w");

if (!logfile) {

perror(logfilename);

_exit(1);

}

#if !defined(CONFIG_SOFTMMU)

/* must avoid mmap() usage of glibc by setting a buffer "by hand" */

{

static uint8_t logfile_buf[4096];

setvbuf(logfile, logfile_buf, _IOLBF, sizeof(logfile_buf));

}

#else

setvbuf(logfile, NULL, _IOLBF, 0);

#endif

}

}

void cpu_set_log_filename(const char *filename)

{

logfilename = strdup(filename);

}

#endif /* !VBOX */

void cpu_interrupt(CPUState *env, int mask)

{

#if !defined(USE_NPTL)

TranslationBlock *tb;

static spinlock_t interrupt_lock = SPIN_LOCK_UNLOCKED;

#endif

int old_mask;

old_mask = env->interrupt_request;

#ifdef VBOX

VM_ASSERT_EMT(env->pVM);

ASMAtomicOrS32((int32_t volatile *)&env->interrupt_request, mask);

#else /* !VBOX */

/* FIXME: This is probably not threadsafe. A different thread could

env->interrupt_request |= mask;

#endif /* !VBOX */

#if defined(USE_NPTL)

/* FIXME: TB unchaining isn't SMP safe. For now just ignore the

#else

if (use_icount) {

env->icount_decr.u16.high = 0xffff;

#ifndef CONFIG_USER_ONLY

/* CPU_INTERRUPT_EXIT isn't a real interrupt. It just means

if (!can_do_io(env)

&& (mask & ~(old_mask | CPU_INTERRUPT_EXIT)) != 0) {

cpu_abort(env, "Raised interrupt while not in I/O function");

}

#endif

} else {

tb = env->current_tb;

/* if the cpu is currently executing code, we must unlink it and

if (tb && !testandset(&interrupt_lock)) {

env->current_tb = NULL;

tb_reset_jump_recursive(tb);

resetlock(&interrupt_lock);

}

}

#endif

}

void cpu_reset_interrupt(CPUState *env, int mask)

{

#ifdef VBOX

/*

ASMAtomicAndS32((int32_t volatile *)&env->interrupt_request, ~mask);

#else /* !VBOX */

env->interrupt_request &= ~mask;

#endif /* !VBOX */

}

#ifndef VBOX

CPULogItem cpu_log_items[] = {

{ CPU_LOG_TB_OUT_ASM, "out_asm",

"show generated host assembly code for each compiled TB" },

{ CPU_LOG_TB_IN_ASM, "in_asm",

"show target assembly code for each compiled TB" },

{ CPU_LOG_TB_OP, "op",

"show micro ops for each compiled TB (only usable if 'in_asm' used)" },

#ifdef TARGET_I386

{ CPU_LOG_TB_OP_OPT, "op_opt",

"show micro ops after optimization for each compiled TB" },

#endif

{ CPU_LOG_INT, "int",

"show interrupts/exceptions in short format" },

{ CPU_LOG_EXEC, "exec",

"show trace before each executed TB (lots of logs)" },

{ CPU_LOG_TB_CPU, "cpu",

"show CPU state before bloc translation" },

#ifdef TARGET_I386

{ CPU_LOG_PCALL, "pcall",

"show protected mode far calls/returns/exceptions" },

#endif

#ifdef DEBUG_IOPORT

{ CPU_LOG_IOPORT, "ioport",

"show all i/o ports accesses" },

#endif

{ 0, NULL, NULL },

};

static int cmp1(const char *s1, int n, const char *s2)

{

if (strlen(s2) != n)

return 0;

return memcmp(s1, s2, n) == 0;

}

int cpu_str_to_log_mask(const char *str)

{

CPULogItem *item;

int mask;

const char *p, *p1;

p = str;

mask = 0;

for(;;) {

p1 = strchr(p, ',');

if (!p1)

p1 = p + strlen(p);

if(cmp1(p,p1-p,"all")) {

for(item = cpu_log_items; item->mask != 0; item++) {

mask |= item->mask;

}

} else {

for(item = cpu_log_items; item->mask != 0; item++) {

if (cmp1(p, p1 - p, item->name))

goto found;

}

return 0;

}

found:

mask |= item->mask;

if (*p1 != ',')

break;

p = p1 + 1;

}

return mask;

}

#endif /* !VBOX */

#ifndef VBOX /* VBOX: we have our own routine. */

void cpu_abort(CPUState *env, const char *fmt, ...)

{

va_list ap;

va_start(ap, fmt);

fprintf(stderr, "qemu: fatal: ");

vfprintf(stderr, fmt, ap);

fprintf(stderr, "\n");

#ifdef TARGET_I386

cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP);

#else

cpu_dump_state(env, stderr, fprintf, 0);

#endif

va_end(ap);

abort();

}

#endif /* !VBOX */

#ifndef VBOX

CPUState *cpu_copy(CPUState *env)

{

CPUState *new_env = cpu_init(env->cpu_model_str);

/* preserve chaining and index */

CPUState *next_cpu = new_env->next_cpu;

int cpu_index = new_env->cpu_index;

memcpy(new_env, env, sizeof(CPUState));

new_env->next_cpu = next_cpu;

new_env->cpu_index = cpu_index;

return new_env;

}

#endif

#if !defined(CONFIG_USER_ONLY)

#ifndef VBOX

static inline void tlb_flush_jmp_cache(CPUState *env, target_ulong addr)

#else

DECLINLINE(void) tlb_flush_jmp_cache(CPUState *env, target_ulong addr)

#endif

{

unsigned int i;

/* Discard jump cache entries for any tb which might potentially

i = tb_jmp_cache_hash_page(addr - TARGET_PAGE_SIZE);

memset (&env->tb_jmp_cache[i], 0,

TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));

i = tb_jmp_cache_hash_page(addr);

memset (&env->tb_jmp_cache[i], 0,

TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));

#ifdef VBOX

/* inform raw mode about TLB page flush */

remR3FlushPage(env, addr);

#endif /* VBOX */

}

static CPUTLBEntry s_cputlb_empty_entry = {

.addr_read = -1,

.addr_write = -1,

.addr_code = -1,

.addend = -1,

};

void tlb_flush(CPUState *env, int flush_global)

{

int i;

#if defined(DEBUG_TLB)

printf("tlb_flush:\n");

#endif

/* must reset current TB so that interrupts cannot modify the

env->current_tb = NULL;

for(i = 0; i < CPU_TLB_SIZE; i++) {

int mmu_idx;

for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {

env->tlb_table[mmu_idx][i] = s_cputlb_empty_entry;

}

}

memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));

#ifdef VBOX

/* inform raw mode about TLB flush */

remR3FlushTLB(env, flush_global);

#endif

#ifdef USE_KQEMU

if (env->kqemu_enabled) {

kqemu_flush(env, flush_global);

}

#endif

tlb_flush_count++;

}

#ifndef VBOX

static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)

#else

DECLINLINE(void) tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)

#endif

{

if (addr == (tlb_entry->addr_read &

(TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||

addr == (tlb_entry->addr_write &

(TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||

addr == (tlb_entry->addr_code &

(TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

tlb_entry->addr_read = -1;

tlb_entry->addr_write = -1;

tlb_entry->addr_code = -1;

}

}

void tlb_flush_page(CPUState *env, target_ulong addr)

{

int i;

#if defined(DEBUG_TLB)

printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr);

#endif

/* must reset current TB so that interrupts cannot modify the

env->current_tb = NULL;

addr &= TARGET_PAGE_MASK;

i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

tlb_flush_entry(&env->tlb_table[0][i], addr);

tlb_flush_entry(&env->tlb_table[1][i], addr);

#if (NB_MMU_MODES >= 3)

tlb_flush_entry(&env->tlb_table[2][i], addr);

#if (NB_MMU_MODES == 4)

tlb_flush_entry(&env->tlb_table[3][i], addr);

#endif

#endif

tlb_flush_jmp_cache(env, addr);

#ifdef USE_KQEMU

if (env->kqemu_enabled) {

kqemu_flush_page(env, addr);

}

#endif

}

static void tlb_protect_code(ram_addr_t ram_addr)

{

cpu_physical_memory_reset_dirty(ram_addr,

ram_addr + TARGET_PAGE_SIZE,

CODE_DIRTY_FLAG);

#if defined(VBOX) && defined(REM_MONITOR_CODE_PAGES)

/** @todo Retest this? This function has changed... */

remR3ProtectCode(cpu_single_env, ram_addr);

#endif

}

static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr,

target_ulong vaddr)

{

#ifdef VBOX

if (RT_LIKELY((ram_addr >> TARGET_PAGE_BITS) < phys_ram_dirty_size))

#endif

phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] |= CODE_DIRTY_FLAG;

}

#ifndef VBOX

static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,

unsigned long start, unsigned long length)

#else

DECLINLINE(void) tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,

unsigned long start, unsigned long length)

#endif

{

unsigned long addr;

#ifdef VBOX

if (start & 3)

return;

#endif

if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {

addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend;

if ((addr - start) < length) {

tlb_entry->addr_write = (tlb_entry->addr_write & TARGET_PAGE_MASK) | IO_MEM_NOTDIRTY;

}

}

}

void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,

int dirty_flags)

{

CPUState *env;

unsigned long length, start1;

int i, mask, len;

uint8_t *p;

start &= TARGET_PAGE_MASK;

end = TARGET_PAGE_ALIGN(end);

length = end - start;

if (length == 0)

return;

len = length >> TARGET_PAGE_BITS;

#ifdef USE_KQEMU

/* XXX: should not depend on cpu context */

env = first_cpu;

if (env->kqemu_enabled) {

ram_addr_t addr;

addr = start;

for(i = 0; i < len; i++) {

kqemu_set_notdirty(env, addr);

addr += TARGET_PAGE_SIZE;

}

}

#endif

mask = ~dirty_flags;

p = phys_ram_dirty + (start >> TARGET_PAGE_BITS);

#ifdef VBOX

if (RT_LIKELY((start >> TARGET_PAGE_BITS) < phys_ram_dirty_size))

#endif

for(i = 0; i < len; i++)

p[i] &= mask;

/* we modify the TLB cache so that the dirty bit will be set again

#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)

start1 = start;

#elif !defined(VBOX)

start1 = start + (unsigned long)phys_ram_base;

#else

start1 = (unsigned long)remR3TlbGCPhys2Ptr(first_cpu, start, 1 /*fWritable*/); /** @todo page replacing (sharing or read only) may cause trouble, fix interface/whatever. */

#endif

for(env = first_cpu; env != NULL; env = env->next_cpu) {

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_reset_dirty_range(&env->tlb_table[0][i], start1, length);

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_reset_dirty_range(&env->tlb_table[1][i], start1, length);

#if (NB_MMU_MODES >= 3)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_reset_dirty_range(&env->tlb_table[2][i], start1, length);

#if (NB_MMU_MODES == 4)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_reset_dirty_range(&env->tlb_table[3][i], start1, length);

#endif

#endif

}

}

#ifndef VBOX

int cpu_physical_memory_set_dirty_tracking(int enable)

{

in_migration = enable;

return 0;

}

int cpu_physical_memory_get_dirty_tracking(void)

{

return in_migration;

}

#endif

#if defined(VBOX) && !defined(REM_PHYS_ADDR_IN_TLB)

DECLINLINE(void) tlb_update_dirty(CPUTLBEntry *tlb_entry, target_phys_addr_t phys_addend)

#else

static inline void tlb_update_dirty(CPUTLBEntry *tlb_entry)

#endif

{

ram_addr_t ram_addr;

if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {

/* RAM case */

#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)

ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend;

#elif !defined(VBOX)

ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) +

tlb_entry->addend - (unsigned long)phys_ram_base;

#else

Assert(phys_addend != -1);

ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + phys_addend;

#endif

if (!cpu_physical_memory_is_dirty(ram_addr)) {

tlb_entry->addr_write |= TLB_NOTDIRTY;

}

}

}

void cpu_tlb_update_dirty(CPUState *env)

{

int i;

#if defined(VBOX) && !defined(REM_PHYS_ADDR_IN_TLB)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[0][i], env->phys_addends[0][i]);

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[1][i], env->phys_addends[1][i]);

#if (NB_MMU_MODES >= 3)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[2][i], env->phys_addends[2][i]);

#if (NB_MMU_MODES == 4)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[3][i], env->phys_addends[3][i]);

#endif

#endif

#else /* VBOX */

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[0][i]);

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[1][i]);

#if (NB_MMU_MODES >= 3)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[2][i]);

#if (NB_MMU_MODES == 4)

for(i = 0; i < CPU_TLB_SIZE; i++)

tlb_update_dirty(&env->tlb_table[3][i]);

#endif

#endif

#endif /* VBOX */

}

#ifndef VBOX

static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)

#else

DECLINLINE(void) tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)

#endif

{

if (tlb_entry->addr_write == (vaddr | TLB_NOTDIRTY))

tlb_entry->addr_write = vaddr;

}

#ifndef VBOX

static inline void tlb_set_dirty(CPUState *env,

unsigned long addr, target_ulong vaddr)

#else

DECLINLINE(void) tlb_set_dirty(CPUState *env,

unsigned long addr, target_ulong vaddr)

#endif

{

int i;

addr &= TARGET_PAGE_MASK;

i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

tlb_set_dirty1(&env->tlb_table[0][i], addr);

tlb_set_dirty1(&env->tlb_table[1][i], addr);

#if (NB_MMU_MODES >= 3)

tlb_set_dirty1(&env->tlb_table[2][i], vaddr);

#if (NB_MMU_MODES == 4)

tlb_set_dirty1(&env->tlb_table[3][i], vaddr);

#endif

#endif

}

int tlb_set_page_exec(CPUState *env, target_ulong vaddr,

target_phys_addr_t paddr, int prot,

int mmu_idx, int is_softmmu)

{

PhysPageDesc *p;

unsigned long pd;

unsigned int index;

target_ulong address;

target_ulong code_address;

target_phys_addr_t addend;

int ret;

CPUTLBEntry *te;

int i;

target_phys_addr_t iotlb;

#if defined(VBOX) && !defined(REM_PHYS_ADDR_IN_TLB)

int read_mods = 0, write_mods = 0, code_mods = 0;

#endif

p = phys_page_find(paddr >> TARGET_PAGE_BITS);

if (!p) {

pd = IO_MEM_UNASSIGNED;

} else {

pd = p->phys_offset;

}

#if defined(DEBUG_TLB)

printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x%08x prot=%x idx=%d smmu=%d pd=0x%08lx\n",

vaddr, (int)paddr, prot, mmu_idx, is_softmmu, pd);

#endif

ret = 0;

address = vaddr;

if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {

/* IO memory case (romd handled later) */

address |= TLB_MMIO;

}

#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)

addend = pd & TARGET_PAGE_MASK;

#elif !defined(VBOX)

addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);

#else

/** @todo this is racing the phys_page_find call above since it may register

addend = (unsigned long)remR3TlbGCPhys2Ptr(env,

pd & TARGET_PAGE_MASK,

!!(prot & PAGE_WRITE));

#endif

if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {

/* Normal RAM. */

iotlb = pd & TARGET_PAGE_MASK;

if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM)

iotlb |= IO_MEM_NOTDIRTY;

else

iotlb |= IO_MEM_ROM;

} else {

/* IO handlers are currently passed a phsical address.

iotlb = (pd & ~TARGET_PAGE_MASK) + paddr;

}

code_address = address;

#if defined(VBOX) && !defined(REM_PHYS_ADDR_IN_TLB)

if (addend & 0x3)

{

if (addend & 0x2)

{

/* catch write */

if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM)

write_mods |= TLB_MMIO;

}

else if (addend & 0x1)

{

/* catch all */

if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM)

{

read_mods |= TLB_MMIO;

write_mods |= TLB_MMIO;

code_mods |= TLB_MMIO;

}

}

if ((iotlb & ~TARGET_PAGE_MASK) == 0)

iotlb = env->pVM->rem.s.iHandlerMemType + paddr;

addend &= ~(target_ulong)0x3;

}

#endif

/* Make accesses to pages with watchpoints go via the

for (i = 0; i < env->nb_watchpoints; i++) {

if (vaddr == (env->watchpoint[i].vaddr & TARGET_PAGE_MASK)) {

iotlb = io_mem_watch + paddr;

/* TODO: The memory case can be optimized by not trapping

address |= TLB_MMIO;

}

}

index = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

env->iotlb[mmu_idx][index] = iotlb - vaddr;

te = &env->tlb_table[mmu_idx][index];

te->addend = addend - vaddr;

if (prot & PAGE_READ) {

te->addr_read = address;

} else {

te->addr_read = -1;

}

if (prot & PAGE_EXEC) {

te->addr_code = code_address;

} else {

te->addr_code = -1;

}

if (prot & PAGE_WRITE) {

if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM ||

(pd & IO_MEM_ROMD)) {

/* Write access calls the I/O callback. */

te->addr_write = address | TLB_MMIO;

} else if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM &&

!cpu_physical_memory_is_dirty(pd)) {

te->addr_write = address | TLB_NOTDIRTY;

} else {

te->addr_write = address;

}

} else {

te->addr_write = -1;

}

#if defined(VBOX) && !defined(REM_PHYS_ADDR_IN_TLB)

if (prot & PAGE_READ)

te->addr_read |= read_mods;

if (prot & PAGE_EXEC)

te->addr_code |= code_mods;

if (prot & PAGE_WRITE)

te->addr_write |= write_mods;

env->phys_addends[mmu_idx][index] = (pd & TARGET_PAGE_MASK)- vaddr;

#endif

#ifdef VBOX

/* inform raw mode about TLB page change */

remR3FlushPage(env, vaddr);

#endif

return ret;

}

#if 0

int page_unprotect(target_ulong addr, unsigned long pc, void *puc)

{

#if !defined(CONFIG_SOFTMMU)

VirtPageDesc *vp;

#if defined(DEBUG_TLB)

printf("page_unprotect: addr=0x%08x\n", addr);

#endif

addr &= TARGET_PAGE_MASK;

/* if it is not mapped, no need to worry here */

if (addr >= MMAP_AREA_END)

return 0;

vp = virt_page_find(addr >> TARGET_PAGE_BITS);

if (!vp)

return 0;

/* NOTE: in this case, validate_tag is _not_ tested as it

if (vp->valid_tag != virt_valid_tag)

return 0;

if (!(vp->prot & PAGE_WRITE))

return 0;

#if defined(DEBUG_TLB)

printf("page_unprotect: addr=0x%08x phys_addr=0x%08x prot=%x\n",

addr, vp->phys_addr, vp->prot);

#endif

if (mprotect((void *)addr, TARGET_PAGE_SIZE, vp->prot) < 0)

cpu_abort(cpu_single_env, "error mprotect addr=0x%lx prot=%d\n",

(unsigned long)addr, vp->prot);

/* set the dirty bit */

phys_ram_dirty[vp->phys_addr >> TARGET_PAGE_BITS] = 0xff;

/* flush the code inside */

tb_invalidate_phys_page(vp->phys_addr, pc, puc);

return 1;

#elif defined(VBOX)

addr &= TARGET_PAGE_MASK;

/* if it is not mapped, no need to worry here */

if (addr >= MMAP_AREA_END)

return 0;

return 1;

#else

return 0;

#endif

}

#endif /* 0 */

#else

void tlb_flush(CPUState *env, int flush_global)

{

}

void tlb_flush_page(CPUState *env, target_ulong addr)

{

}

int tlb_set_page_exec(CPUState *env, target_ulong vaddr,

target_phys_addr_t paddr, int prot,

int mmu_idx, int is_softmmu)

{

return 0;

}

#ifndef VBOX

void page_dump(FILE *f)

{

unsigned long start, end;

int i, j, prot, prot1;

PageDesc *p;

fprintf(f, "%-8s %-8s %-8s %s\n",

"start", "end", "size", "prot");

start = -1;

end = -1;

prot = 0;

for(i = 0; i <= L1_SIZE; i++) {

if (i < L1_SIZE)

p = l1_map[i];

else

p = NULL;

for(j = 0;j < L2_SIZE; j++) {

if (!p)

prot1 = 0;

else

prot1 = p[j].flags;

if (prot1 != prot) {

end = (i << (32 - L1_BITS)) | (j << TARGET_PAGE_BITS);

if (start != -1) {

fprintf(f, "%08lx-%08lx %08lx %c%c%c\n",

start, end, end - start,

prot & PAGE_READ ? 'r' : '-',

prot & PAGE_WRITE ? 'w' : '-',

prot & PAGE_EXEC ? 'x' : '-');

}

if (prot1 != 0)

start = end;

else

start = -1;

prot = prot1;

}

if (!p)

break;

}

}

}

#endif /* !VBOX */

int page_get_flags(target_ulong address)

{

PageDesc *p;

p = page_find(address >> TARGET_PAGE_BITS);

if (!p)

return 0;

return p->flags;

}

void page_set_flags(target_ulong start, target_ulong end, int flags)

{

PageDesc *p;

target_ulong addr;

start = start & TARGET_PAGE_MASK;

end = TARGET_PAGE_ALIGN(end);

if (flags & PAGE_WRITE)

flags |= PAGE_WRITE_ORG;

#ifdef VBOX

AssertMsgFailed(("We shouldn't be here, and if we should, we must have an env to do the proper locking!\n"));

#endif

spin_lock(&tb_lock);

for(addr = start; addr < end; addr += TARGET_PAGE_SIZE) {

p = page_find_alloc(addr >> TARGET_PAGE_BITS);

/* if the write protection is set, then we invalidate the code

if (!(p->flags & PAGE_WRITE) &&

(flags & PAGE_WRITE) &&

p->first_tb) {

tb_invalidate_phys_page(addr, 0, NULL);

}

p->flags = flags;

}

spin_unlock(&tb_lock);

}

int page_check_range(target_ulong start, target_ulong len, int flags)

{

PageDesc *p;

target_ulong end;

target_ulong addr;

end = TARGET_PAGE_ALIGN(start+len); /* must do before we loose bits in the next step */

start = start & TARGET_PAGE_MASK;

if( end < start )

/* we've wrapped around */

return -1;

for(addr = start; addr < end; addr += TARGET_PAGE_SIZE) {

p = page_find(addr >> TARGET_PAGE_BITS);

if( !p )

return -1;

if( !(p->flags & PAGE_VALID) )

return -1;

if ((flags & PAGE_READ) && !(p->flags & PAGE_READ))

return -1;

if (flags & PAGE_WRITE) {

if (!(p->flags & PAGE_WRITE_ORG))

return -1;

/* unprotect the page if it was put read-only because it

if (!(p->flags & PAGE_WRITE)) {

if (!page_unprotect(addr, 0, NULL))

return -1;

}

return 0;

}

}

return 0;

}

int page_unprotect(target_ulong address, unsigned long pc, void *puc)

{

unsigned int page_index, prot, pindex;

PageDesc *p, *p1;

target_ulong host_start, host_end, addr;

/* Technically this isn't safe inside a signal handler. However we

mmap_lock();

host_start = address & qemu_host_page_mask;

page_index = host_start >> TARGET_PAGE_BITS;

p1 = page_find(page_index);

if (!p1) {

mmap_unlock();

return 0;

}

host_end = host_start + qemu_host_page_size;

p = p1;

prot = 0;

for(addr = host_start;addr < host_end; addr += TARGET_PAGE_SIZE) {

prot |= p->flags;

p++;

}

/* if the page was really writable, then we change its

if (prot & PAGE_WRITE_ORG) {

pindex = (address - host_start) >> TARGET_PAGE_BITS;

if (!(p1[pindex].flags & PAGE_WRITE)) {

mprotect((void *)g2h(host_start), qemu_host_page_size,

(prot & PAGE_BITS) | PAGE_WRITE);

p1[pindex].flags |= PAGE_WRITE;

/* and since the content will be modified, we must invalidate

tb_invalidate_phys_page(address, pc, puc);

#ifdef DEBUG_TB_CHECK

tb_invalidate_check(address);

#endif

mmap_unlock();

return 1;

}

}

mmap_unlock();

return 0;

}

static inline void tlb_set_dirty(CPUState *env,

unsigned long addr, target_ulong vaddr)