4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#ifndef QEMU_CACHE_UTILS_H
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#define QEMU_CACHE_UTILS_H
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#if defined(_ARCH_PPC)
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsyncstruct qemu_cache_conf {
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync unsigned long dcache_bsize;
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync unsigned long icache_bsize;
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync};
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsyncextern struct qemu_cache_conf qemu_cache_conf;
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsyncextern void qemu_cache_utils_init(char **envp);
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync/* mildly adjusted code from tcg-dyngen.c */
3d40f685fa5cdd9cb665ae3cbf5f76113dafcb99vboxsyncstatic inline void flush_icache_range(uintptr_t start, uintptr_t stop)
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync{
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync unsigned long p, start1, stop1;
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync unsigned long dsize = qemu_cache_conf.dcache_bsize;
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync unsigned long isize = qemu_cache_conf.icache_bsize;
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync start1 = start & ~(dsize - 1);
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync stop1 = (stop + dsize - 1) & ~(dsize - 1);
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync for (p = start1; p < stop1; p += dsize) {
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync }
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync asm volatile ("sync" : : : "memory");
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync start &= start & ~(isize - 1);
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync stop1 = (stop + isize - 1) & ~(isize - 1);
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync for (p = start1; p < stop1; p += isize) {
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync }
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync asm volatile ("sync" : : : "memory");
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync asm volatile ("isync" : : : "memory");
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync}
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#else
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#endif
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync
4af48bf7c72ef1e201c64bd475377b5af9d8e8a1vboxsync#endif /* QEMU_CACHE_UTILS_H */