cidet.h revision 25ceded49a517b215750ee9e4193dafec2609db8
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * CPU Instruction Decoding & Execution Tests - C/C++ Header.
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * Copyright (C) 2014 Oracle Corporation
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * available from http://www.virtualbox.org. This file is free software;
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * you can redistribute it and/or modify it under the terms of the GNU
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * General Public License (GPL) as published by the Free Software
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * The contents of this file may alternatively be used under the terms
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * of the Common Development and Distribution License Version 1.0
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b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * VirtualBox OSE distribution, in which case the provisions of the
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * CDDL are applicable instead of those of the GPL.
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * You may elect to license modified versions of this file under the
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b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/** @name CIDET - Operand flags.
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_FIXED_MASK UINT32_C(0x0000001f) /**< Fixed register/whatever mask. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_MASK UINT32_C(0x00000f00) /**< Size mask. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_NONE UINT32_C(0x00000000) /**< Unused zero value. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_BYTE UINT32_C(0x00000100) /**< Byte size. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_WORD UINT32_C(0x00000200) /**< Word (2 bytes) size. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_DWORD UINT32_C(0x00000300) /**< Double word (4 bytes) size. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_QWORD UINT32_C(0x00000400) /**< Quad word (8 bytes) size. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_TBYTE UINT32_C(0x00000500) /**< Ten byte (10 bytes) size - aka TWORD. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_OWORD UINT32_C(0x00000600) /**< Octa word (16 bytes) size - aka DQWORD. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_YWORD UINT32_C(0x00000700) /**< Yxx sized, i.e. 32 bytes. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_ZWORD UINT32_C(0x00000800) /**< Zxx sized, i.e. 64 bytes. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_VAR_WDQ UINT32_C(0x00000900) /**< Variable size depending on size prefix (2, 4, or 8 bytes). */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_Z_SPECIAL UINT32_C(0x00000f00) /**< Special size, see instruction flags or smth. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_MASK UINT32_C(0x0000f000) /**< Kind of operand. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_NONE UINT32_C(0x00000000) /**< Unused zero value. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_GPR UINT32_C(0x00001000) /**< General purpose register. Includes memory when used with CIDET_OF_M_RM. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_SREG UINT32_C(0x00002000) /**< Segment register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_CR UINT32_C(0x00003000) /**< Control register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_SSE UINT32_C(0x00004000) /**< SSE register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_AVX UINT32_C(0x00005000) /**< AVX register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_AVX512 UINT32_C(0x00006000) /**< AVX-512 register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_AVXFUTURE UINT32_C(0x00007000) /**< Reserved for future AVX register set. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_VRX_TST_MASK UINT32_C(0x0000c000) /**< Used for testing for VRX register kind, see CIDET_OF_K_IS_VRX. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_VRX_TST_RES UINT32_C(0x00004000) /**< Used for testing for VRX register kind, see CIDET_OF_K_IS_VRX. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_FPU UINT32_C(0x00008000) /**< FPU register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_MMX UINT32_C(0x00009000) /**< MMX register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_TEST UINT32_C(0x0000a000) /**< Test register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_IMM UINT32_C(0x0000d000) /**< Immediate. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_MEM UINT32_C(0x0000e000) /**< Memory. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_SPECIAL UINT32_C(0x0000f000) /**< Special. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/** Check if @a a_fOp is a general purpose register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_IS_GPR(a_fOp) ( ((a_fOp) & CIDET_OF_K_MASK) == CIDET_OF_K_GPR )
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/** Check if @a a_fOp is a XMM (SSE), YMM (AVX), ZMM (AVX-512) or similar register. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_K_IS_VRX(a_fOp) ( ((a_fOp) & CIDET_OF_K_VRX_TST_MASK) == CIDET_OF_K_VRX_TST_RES )
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/** Check if @a a_fOp1 and @a a_fOp2 specify the same kind of register,
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * treating SSE, AVX, AVX-512 and AVX-future as the same kind and ignoring the
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * special register kind. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync ( ((a_fOp1) & CIDET_OF_K_MASK) == ((a_fOp2) & CIDET_OF_K_MASK) \
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync ? ((a_fOp1) & CIDET_OF_K_MASK) != CIDET_OF_K_SPECIAL \
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync : (CIDET_OF_K_IS_VRX(a_fOp1) && CIDET_OF_K_IS_VRX(a_fOp2)) )
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_M_RM (CIDET_OF_M_RM_ONLY_R | CIDET_OF_M_RM_ONLY_M)
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_A_R UINT32_C(0x00080000) /**< Read access. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_A_W UINT32_C(0x00100000) /**< Write access. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync#define CIDET_OF_A_RW UINT32_C(0x00180000) /**< Read & write access. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/** The operand defaults to 64-bit width in 64-bit mode, making 32-bit width
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync * inaccessible. */
b8e299dddd091ae24e0c08c45d91b8f937bd14d2vboxsync/** Operand always uses the ES segment for memory accesses. */
* cause exceptions/faults.
typedef struct CIDETINSTR
const char *pszMnemonic;
} CIDETINSTR;
typedef struct CIDETCPUCTX
bool fTrickyStack; /**< Set if the stack might be bad. May come at the cost of accurate flags (32-bit). */
} CIDETCPUCTX;
#define CIDETMODE_BIT_MASK UINT8_C(0x0e) /**< The instruction bit count. Results in byte size when masked. */
typedef enum CIDETREG
#define CIDETREG_DBG_IS_VALID(a_iReg) ((a_iReg) < kCidetReg_Dbg_dr8 && (a_iReg) >= kCidetReg_Dbg_First)
} CIDETREG;
#define CIDETBUF_PROT_RWX_1NP UINT32_C(0x00000005) /**< Read + write + execute; 1 page not present. */
#define CIDETBUF_PROT_RWX_1RWNX UINT32_C(0x00000006) /**< Read + write + execute; 1 page read + write + no execute. */
#define CIDETBUF_PROT_RWX_1RNX UINT32_C(0x00000007) /**< Read + write + execute; 1 page read + no execute. */
#define CIDETBUF_PROT_RWX_1RWXS UINT32_C(0x00000008) /**< Read + write + execute; 1 page read + execute + supervisor. */
#define CIDETBUF_SEG_LIMIT_BASE_CAP UINT32_C(0x00008000) /**< Capability to change segment limit and base. */
typedef enum CIDETEXPECTXCPT
typedef struct CIDETBUFCFG
const char *pszName;
} CIDETBUFCFG;
typedef struct CIDETBUF
} CIDETBUF;
typedef struct CIDETCORE
DECLCALLBACKMEMBER(bool, pfnSetupDataBuf)(struct CIDETCORE *pThis, PCIDETBUF pBuf, void const *pvSrc);
DECLCALLBACKMEMBER(bool, pfnIsBufEqual)(struct CIDETCORE *pThis, struct CIDETBUF *pBuf, void const *pvExpected);
DECLCALLBACKMEMBER(bool, pfnSetupCodeBuf)(struct CIDETCORE *pThis, PCIDETBUF pBuf, void const *pvInstr);
/** The effective instruction address. (See InCtx.rip and InCtx.cs for the
} CIDETCORE;