tstX86-FpuSaveRestore.cpp revision 694a19c714ec9c163176f2c8d9dd69dd16018a0d
/* $Id$ */
/** @file
* tstX86-FpuSaveRestore - Experimenting with saving and restoring FPU.
*/
/*
* Copyright (C) 2013 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#include <iprt/initterm.h>
DECLASM(void) MyFpuPrepXcpt(void);
int main()
{
/* Trigger an exception to make sure we've got something to look at. */
static X86FXSTATE FxState;
static X86FSTENV32P FpuEnv;
#ifdef RT_ARCH_AMD64
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxState.Rsrvd1, FxState.CS, FxState.FPUIP);
#else
#endif
/* Modify the state a little so we can tell the difference. */
static X86FXSTATE FxState2;
static X86FSTENV32P FpuEnv2;
/* Just do FXRSTOR. */
static X86FXSTATE FxStateJustRestore;
static X86FSTENV32P FpuEnvJustRestore;
#ifdef RT_ARCH_AMD64
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateJustRestore.Rsrvd1, FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
#else
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
#endif
RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvJustRestore.FPUCS, FpuEnvJustRestore.FPUIP);
/* FXRSTORE + FLDENV */
static X86FXSTATE FxStateRestoreLoad;
static X86FSTENV32P FpuEnvRestoreLoad;
#ifdef RT_ARCH_AMD64
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateRestoreLoad.Rsrvd1, FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
#else
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
#endif
RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvRestoreLoad.FPUCS, FpuEnvRestoreLoad.FPUIP);
/* Reverse the order (FLDENV + FXRSTORE). */
static X86FXSTATE FxStateLoadRestore;
static X86FSTENV32P FpuEnvLoadRestore;
#ifdef RT_ARCH_AMD64
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateLoadRestore.Rsrvd1, FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
#else
RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
#endif
RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvLoadRestore.FPUCS, FpuEnvLoadRestore.FPUIP);
return RTTestSummaryAndDestroy(hTest);
}