CPUMInternal.h revision 7481bcc52798a04f39bb360635624df5658d2791
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * CPUM - Internal header file.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Copyright (C) 2006-2012 Oracle Corporation
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * This file is part of VirtualBox Open Source Edition (OSE), as
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * available from http://www.virtualbox.org. This file is free software;
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * you can redistribute it and/or modify it under the terms of the GNU
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * General Public License (GPL) as published by the Free Software
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Foundation, in version 2 as it comes in the "COPYING" file of the
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** @defgroup grp_cpum_int Internals
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * @ingroup grp_cpum
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * @internal
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Flags and types for CPUM fault handlers
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Type: Load DS */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Type: Load ES */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Type: Load FS */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Type: Load GS */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Type: IRET */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Type mask. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** If set EBP points to the CPUMCTXCORE that's being used. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Use flags (CPUM::fUseFlags).
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * (Don't forget to sync this with CPUMInternal.mac !)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Used the FPU, SSE or such stuff. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Used the FPU, SSE or such stuff since last we were in REM.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * REM syncing is clearing this, lazy FPU is setting it. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** The XMM state was manually restored. (AMD only) */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Host OS is using SYSENTER and we must NULL the CS. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Host OS is using SYSENTER and we must NULL the CS. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Debug registers are used by host and that DR7 and DR6 must be saved and
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * disabled when switching to raw-mode. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Records that we've saved the host DRx registers.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * In ring-0 this means all (DR0-7), while in raw-mode context this means DR0-3
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * since DR6 and DR7 are covered by CPUM_USE_DEBUG_REGS_HOST. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Set to indicate that we should save host DR0-7 and load the hypervisor debug
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * registers in the raw-mode world switchers. (See CPUMRecalcHyperDRx.) */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Used in ring-0 to indicate that we have loaded the hypervisor debug
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * registers. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Used in ring-0 to indicate that we have loaded the guest debug
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * registers (DR0-3 and maybe DR6) for direct use by the guest.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * DR7 (and AMD-V DR6) are handled via the VMCB. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Sync the FPU state on next entry (32->64 switcher only). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Sync the debug state on next entry (32->64 switcher only). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Sync the debug state on next entry (32->64 switcher only).
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Almost the same as CPUM_USE_DEBUG_REGS_HYPER in the raw-mode switchers. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Host CPU requires fxsave/fxrstor leaky bit handling. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/* Sanity check. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock#if defined(VBOX_WITH_HYBRID_32BIT_KERNEL) && (HC_ARCH_BITS != 32 || R0_ARCH_BITS != 32)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock# error "VBOX_WITH_HYBRID_32BIT_KERNEL is only for 32 bit builds."
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * MSR read functions.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Invalid zero value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Return the CPUMMSRRANGE::uValue. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Alias to the MSR range starting at the MSR given by
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * CPUMMSRRANGE::uValue. Must be used in pair with
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * kCpumMsrWrFn_MsrAlias. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Write only register, GP all read attempts. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32PlatformId, /**< Takes real CPU value for reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32BiosSignId, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32MtrrCap, /**< Takes real CPU value for reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32MtrrPhysBaseN, /**< Takes register number. */
9af3851a3a831b4de34b42482c22351e14f33f16eschrock kCpumMsrRdFn_Ia32MtrrPhysMaskN, /**< Takes register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32MtrrFixed, /**< Takes CPUMCPU offset. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32PerfEvtSelN, /**< Range value indicates the register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32PerfStatus, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32PerfCtl, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32FixedCtrN, /**< Takes register number of start of range. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32PerfCapabilities, /**< Takes reference value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32PerfGlobalStatus, /**< Takes reference value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32ClockModulation, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32ThermInterrupt, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32ThermStatus, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32Therm2Ctl, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32MiscEnable, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32McCtlStatusAddrMiscN, /**< Takes bank number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32McNCtl2, /**< Takes register number of start of range. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxBase, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxPinbasedCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxProcbasedCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxExitCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxEntryCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxMisc, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxCr0Fixed0, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxCr0Fixed1, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxCr4Fixed0, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxCr4Fixed1, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxVmcsEnum, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxProcBasedCtls2, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxEptVpidCap, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxTruePinbasedCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxTrueProcbasedCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxTrueExitCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_Ia32VmxTrueEntryCtls, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelP6FsbFrequency, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelFlexRatio, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7TemperatureTarget, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7MsrOffCoreResponseN,/**< Takes register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7TurboRatioLimit, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7VirtualLegacyWireCap,/**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7PkgCnResidencyN, /**< Takes C-state number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7CoreCnResidencyN, /**< Takes C-state number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7SandyVrCurrentConfig,/**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7SandyVrMiscConfig, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7SandyRaplPowerUnit, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7SandyPkgCnIrtlN, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7SandyPkgC2Residency, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPkgPowerLimit, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPkgEnergyStatus, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPkgPerfStatus, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPkgPowerInfo, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplDramPowerLimit, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplDramEnergyStatus,/**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplDramPerfStatus, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplDramPowerInfo, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp0PowerLimit, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp0EnergyStatus, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp0Policy, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp0PerfStatus, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp1PowerLimit, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp1EnergyStatus, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7RaplPp1Policy, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7IvyConfigTdpNominal, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7IvyConfigTdpLevel1, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelI7IvyConfigTdpLevel2, /**< Takes real value as reference. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_IntelCore2EmttmCrTablesN, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK8SysCfg, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK8HwThermalCtrl, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK8FidVidControl, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK8FidVidStatus, /**< Range value returned. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdFam10hPStateCurLimit, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdFam10hPStateControl, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdFam10hPStateStatus, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdFam10hPStateN, /**< Returns range value. This isn't an register index! */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdFam10hCofVidControl, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdFam10hCofVidStatus, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK7MicrocodeCtl, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK7ClusterIdMaybe, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK8PatchLevel, /**< Returns range value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrRdFn_AmdK7DrXAddrMaskN, /**< Takes register index. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** End of valid MSR read function indexes. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * MSR write functions.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Invalid zero value. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Writes are ignored, the fWrGpMask is observed though. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Writes cause GP(0) to be raised, the fWrGpMask should be UINT64_MAX. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Alias to the MSR range starting at the MSR given by
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * CPUMMSRRANGE::uValue. Must be used in pair with
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * kCpumMsrRdFn_MsrAlias. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32MtrrPhysBaseN, /**< Takes register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32MtrrPhysMaskN, /**< Takes register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32MtrrFixed, /**< Takes CPUMCPU offset. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32PerfEvtSelN, /**< Range value indicates the register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32FixedCtrN, /**< Takes register number of start of range. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32McCtlStatusAddrMiscN, /**< Takes bank number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_Ia32McNCtl2, /**< Takes register number of start of range. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_IntelI7MsrOffCoreResponseN, /**< Takes register number. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock kCpumMsrWrFn_AmdK7DrXAddrMaskN, /**< Takes register index. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** End of valid MSR write function indexes. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * CPU features and quirks.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * This is mostly exploded CPUID info.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrocktypedef struct CPUMFEATURES
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The CPU vendor (CPUMCPUVENDOR). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The CPU family. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The CPU model. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The CPU stepping. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The microarchitecture. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The maximum physical address with of the CPU. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Alignment padding. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Supports MSRs. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Supports the page size extension (4/2 MB pages). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Supports 36-bit page size extension (4 MB pages can map memory above
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Supports physical address extension (PAE). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Page attribute table (PAT) support (page level cache control). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Supports the FXSAVE and FXRSTOR instructions. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Intel SYSENTER/SYSEXIT support */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** First generation APIC. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Second generation APIC. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Hypervisor present. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** MWAIT & MONITOR instructions supported. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** AMD64: Supports long mode. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** AMD64: SYSCALL/SYSRET support. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** AMD64: No-execute page table bit. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** AMD64: Supports LAHF & SAHF instructions in 64-bit mode. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** AMD64: Supports RDTSCP. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Indicates that FPU instruction and data pointers may leak.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * This generally applies to recent AMD CPUs, where the FPU IP and DP pointer
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * is only saved and restored if an exception is pending. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Alignment padding. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Pointer to a CPU feature structure. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Pointer to a const CPU feature structure. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrocktypedef struct CPUMINFO
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The number of MSR ranges (CPUMMSRRANGE) in the array pointed to below. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Mask applied to ECX before looking up the MSR for a RDMSR/WRMSR
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * instruction. Older hardware has been observed to ignore higher bits. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The number of CPUID leaves (CPUMCPUIDLEAF) in the array pointed to below. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The index of the first extended CPUID leaf in the array.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Set to cCpuIdLeaves if none present. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Alignment padding. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** How to handle unknown CPUID leaves. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** For use with CPUMUKNOWNCPUID_DEFAULTS. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Scalable bus frequency used for reporting other frequencies. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Pointer to the MSR ranges (ring-0 pointer). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Pointer to the CPUID leaves (ring-0 pointer). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Pointer to the MSR ranges (ring-3 pointer). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Pointer to the CPUID leaves (ring-3 pointer). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Pointer to the MSR ranges (raw-mode context pointer). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Pointer to the CPUID leaves (raw-mode context pointer). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Pointer to a CPU info structure. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Pointer to a const CPU info structure. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * The saved host CPU state.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * @remark The special VBOX_WITH_HYBRID_32BIT_KERNEL checks here are for the 10.4.x series
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * of Mac OS X where the OS is essentially 32-bit but the cpu mode can be 64-bit.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrocktypedef struct CPUMHOSTCTX
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** FPU state. (16-byte alignment)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * @remark On x86, the format isn't necessarily X86FXSTATE (not important). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** General purpose register, selectors, flags and more
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock#if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** General purpose register ++
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t rax; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t rcx; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t rdx; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t r8; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t r9; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t rip; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint32_t eax; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint32_t ecx; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint32_t edx; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint32_t eip; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /* lss pair! */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Selector registers
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock#if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Control registers.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint32_t cr2; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Debug registers.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Global Descriptor Table register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Interrupt Descriptor Table register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The task register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The task register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The sysenter msr registers.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * This member is not used by the hypervisor context. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /* padding to get 64byte aligned size */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock#elif HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Control registers.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /*uint64_t cr2; - scratch*/
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Debug registers.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Global Descriptor Table register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Interrupt Descriptor Table register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The task register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The task register. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /* padding to get 32byte aligned size */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Pointer to the saved host CPU state. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * CPUM Data (part of VM)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrocktypedef struct CPUM
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Offset from CPUM to CPUMCPU for the first CPU. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Use flags.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * These flags indicates which CPU features the host uses.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Host CPU Features - ECX */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** edx part */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** ecx part */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Host extended CPU features. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** edx part */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** ecx part */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** CR4 mask */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock uint32_t AndMask; /**< @todo Move these to the per-CPU structure and fix the switchers. Saves a register! */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The (more) portable CPUID level. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Indicates that a state restore is pending.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * This is used to verify load order dependencies (PGM). */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The standard set of CpuId leaves. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The extended set of CpuId leaves. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The centaur set of CpuId leaves. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The hypervisor specific set of CpuId leaves. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** The default set of CpuId leaves. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Guest CPU info. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Guest CPU feature information. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Host CPU feature information. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** @name MSR statistics.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock/** Pointer to the CPUM instance data residing in the shared VM structure. */
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * CPUM Data (part of VMCPU)
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrocktypedef struct CPUMCPU
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Hypervisor context.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Aligned on a 64-byte boundary.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Saved host context. Only valid while inside GC.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Aligned on a 64-byte boundary.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Guest context.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Aligned on a 64-byte boundary.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Guest context - misc MSRs
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock * Aligned on a 64-byte boundary.
275c9da86e89f8abf71135cf63d9fc23671b2e60eschrock /** Use flags.
bool fX2Apic;
bool fRawEntered;
bool fRemEntered;
} CPUMCPU;
#ifndef VBOX_FOR_DTRACE_LIB
#ifdef IN_RING3
PCPUMCPUIDLEAF cpumR3CpuIdGetLeaf(PCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, uint32_t uLeaf, uint32_t uSubLeaf);
bool cpumR3CpuIdGetLeafLegacy(PCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, uint32_t uLeaf, uint32_t uSubLeaf,
int cpumR3CpuIdInsert(PVM pVM, PCPUMCPUIDLEAF *ppaLeaves, uint32_t *pcLeaves, PCPUMCPUIDLEAF pNewLeaf);
void cpumR3CpuIdRemoveRange(PCPUMCPUIDLEAF paLeaves, uint32_t *pcLeaves, uint32_t uFirst, uint32_t uLast);
int cpumR3CpuIdExplodeFeatures(PCCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, PCPUMFEATURES pFeatures);
int cpumR3MsrRangesInsert(PVM pVM, PCPUMMSRRANGE *ppaMsrRanges, uint32_t *pcMsrRanges, PCCPUMMSRRANGE pNewRange);
int cpumR3MsrStrictInitChecks(void);
#ifdef IN_RC
#ifdef IN_RING0