EMRaw.cpp revision e132802aac955bd3d8476d42e98c67e323bc29c8
/* $Id$ */
/** @file
* EM - Execution Monitor / Manager - software virtualization
*/
/*
* Copyright (C) 2006-2012 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_EM
#ifdef VBOX_WITH_REM
#endif
#include "EMInternal.h"
#include <VBox/disopcode.h>
#include "VMMTracing.h"
/*******************************************************************************
* Internal Functions *
*******************************************************************************/
DECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
#define EMHANDLERC_WITH_PATM
#include "EMHandleRCTmpl.h"
#ifdef VBOX_WITH_STATISTICS
/**
* Just a braindead function to keep track of cli addresses.
* @param pVM VM handle.
* @param pVMCPU VMCPU handle.
* @param GCPtrInstr The EIP of the cli instruction.
*/
{
if (!pRec)
{
/* New cli instruction; insert into the tree. */
if (!pRec)
return;
char szCliStatName[32];
STAM_REG(pVM, &pRec->Counter, STAMTYPE_COUNTER, szCliStatName, STAMUNIT_OCCURENCES, "Number of times cli was executed.");
}
}
#endif /* VBOX_WITH_STATISTICS */
/**
* Resumes executing hypervisor after a debug event.
*
* This is kind of special since our current guest state is
* potentially out of sync.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param pVCpu The VMCPU handle.
*/
{
int rc;
/*
* Resume execution.
*/
Log(("emR3RawResumeHyper: cs:eip=%RTsel:%RGr efl=%RGr - returned from GC with rc=%Rrc\n", pCtx->cs, pCtx->eip, pCtx->eflags, rc));
/*
* Deal with the return code.
*/
return rc;
}
/**
* Steps rawmode.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param pVCpu The VMCPU handle.
*/
{
int rc;
#ifndef DEBUG_sandervl
Log(("emR3RawStep: cs:eip=%RTsel:%RGr efl=%RGr\n", fGuest ? CPUMGetGuestCS(pVCpu) : CPUMGetHyperCS(pVCpu),
fGuest ? CPUMGetGuestEIP(pVCpu) : CPUMGetHyperEIP(pVCpu), fGuest ? CPUMGetGuestEFlags(pVCpu) : CPUMGetHyperEFlags(pVCpu)));
#endif
if (fGuest)
{
/*
* Check vital forced actions, but ignore pending interrupts and timers.
*/
{
if (rc != VINF_SUCCESS)
return rc;
}
/*
* Set flags for single stepping.
*/
}
else
/*
* Single step.
* We do not start time or anything, if anything we should just do a few nanoseconds.
*/
do
{
else
#ifndef DEBUG_sandervl
Log(("emR3RawStep: cs:eip=%RTsel:%RGr efl=%RGr - GC rc %Rrc\n", fGuest ? CPUMGetGuestCS(pVCpu) : CPUMGetHyperCS(pVCpu),
fGuest ? CPUMGetGuestEIP(pVCpu) : CPUMGetHyperEIP(pVCpu), fGuest ? CPUMGetGuestEFlags(pVCpu) : CPUMGetHyperEFlags(pVCpu), rc));
#endif
} while ( rc == VINF_SUCCESS
|| rc == VINF_EM_RAW_INTERRUPT);
/*
* Make sure the trap flag is cleared.
* (Too bad if the guest is trying to single step too.)
*/
if (fGuest)
else
/*
* Deal with the return codes.
*/
return rc;
}
#ifdef DEBUG
{
int rc = VINF_SUCCESS;
Log(("Single step BEGIN:\n"));
for (uint32_t i = 0; i < cIterations; i++)
{
if (rc != VINF_SUCCESS)
break;
}
return rc;
}
#endif /* DEBUG */
/**
* Executes one (or perhaps a few more) instruction(s).
*
* @returns VBox status code suitable for EM.
*
* @param pVM VM handle.
* @param pVCpu VMCPU handle
* @param rcGC GC return code
* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
* instruction and prefix the log output with this text.
*/
#ifdef LOG_ENABLED
#else
#endif
{
int rc;
/*
*
* The simple solution is to use the recompiler.
* The better solution is to disassemble the current instruction and
* try handle as many as possible without using REM.
*
*/
#ifdef LOG_ENABLED
/*
* Disassemble the instruction if requested.
*/
if (pszPrefix)
{
}
#endif /* LOG_ENABLED */
/*
* PATM is making life more interesting.
* We cannot hand anything to REM which has an EIP inside patch code. So, we'll
* tell PATM there is a trap in this code and have it take the appropriate actions
* to allow us execute the code in REM.
*/
{
switch (rc)
{
/*
* It's not very useful to emulate a single instruction and then go back to raw
* mode; just execute the whole block until IF is set again.
*/
case VINF_SUCCESS:
Log(("emR3ExecuteInstruction: Executing instruction starting at new address %RGv IF=%d VMIF=%x\n",
{
/*
*/
Log(("PATCH: IF=1 -> emulate last instruction as it can't be interrupted!!\n"));
}
else if (rcGC == VINF_PATM_PENDING_IRQ_AFTER_IRET)
{
}
return VINF_EM_RESCHEDULE_REM;
/*
* One instruction.
*/
case VINF_PATCH_EMULATE_INSTR:
Log(("emR3ExecuteInstruction: Emulate patched instruction at %RGv IF=%d VMIF=%x\n",
/*
* The patch was disabled, hand it to the REM.
*/
case VERR_PATCH_DISABLED:
Log(("emR3ExecuteInstruction: Disabled patch -> new eip %RGv IF=%d VMIF=%x\n",
{
/*
*/
Log(("PATCH: IF=1 -> emulate last instruction as it can't be interrupted!!\n"));
}
return VINF_EM_RESCHEDULE_REM;
/* Force continued patch exection; usually due to write monitored stack. */
case VINF_PATCH_CONTINUE:
return VINF_SUCCESS;
default:
return VERR_IPE_UNEXPECTED_STATUS;
}
}
#ifdef VBOX_WITH_REM
/* Flush the recompiler TLB if the VCPU has changed. */
#else
#endif
return rc;
}
/**
* Executes one (or perhaps a few more) instruction(s).
* This is just a wrapper for discarding pszPrefix in non-logging builds.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
* instruction and prefix the log output with this text.
* @param rcGC GC return code
*/
{
#ifdef LOG_ENABLED
#else
#endif
}
/**
* Executes one (or perhaps a few more) IO instruction(s).
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
*/
{
/** @todo probably we should fall back to the recompiler; otherwise we'll go back and forth between HC & GC
* as io instructions tend to come in packages of more than one
*/
if (RT_SUCCESS(rc))
{
{
{
case OP_IN:
{
break;
}
case OP_OUT:
{
break;
}
}
}
{
{
case OP_INSB:
case OP_INSWD:
{
break;
}
case OP_OUTSB:
case OP_OUTSWD:
{
break;
}
}
}
/*
* Handled the I/O return codes.
* (The unhandled cases end up with rcStrict == VINF_EM_RAW_EMULATE_INSTR.)
*/
if (IOM_SUCCESS(rcStrict))
{
return VBOXSTRICTRC_TODO(rcStrict);
}
if (rcStrict == VINF_EM_RAW_GUEST_TRAP)
{
return VBOXSTRICTRC_TODO(rcStrict);
}
if (RT_FAILURE(rcStrict))
{
return VBOXSTRICTRC_TODO(rcStrict);
}
AssertMsg(rcStrict == VINF_EM_RAW_EMULATE_INSTR || rcStrict == VINF_EM_RESCHEDULE_REM, ("rcStrict=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
}
}
/**
* Handle a guest context trap.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
*/
{
/*
* Get the trap info.
*/
if (RT_FAILURE(rc))
{
return rc;
}
#if 1 /* Experimental: Review, disable if it causes trouble. */
/*
* Handle traps in patch code first.
*
* We catch a few of these cases in RC before returning to R3 (#PF, #GP, #BP)
* but several traps isn't handled specially by TRPM in RC and we end up here
* instead. One example is #DE.
*/
if ( uCpl == 0
{
}
#endif
/*
* If the guest gate is marked unpatched, then we will check again if we can patch it.
* (This assumes that we've already tried and failed to dispatch the trap in
* RC for the gates that already has been patched. Which is true for most high
* volume traps, because these are handled specially, but not for odd ones like #DE.)
*/
{
Log(("emR3RawHandleRC: recheck gate %x -> valid=%d\n", u8TrapNo, TRPMR3GetGuestTrapHandler(pVM, u8TrapNo) != TRPM_INVALID_HANDLER));
/* If it was successful, then we could go back to raw mode. */
{
/* Must check pending forced actions as our IDT or GDT might be out of sync. */
{
return VINF_EM_RESCHEDULE_RAW;
}
}
}
/*
* Scan kernel code that traps; we might not get another chance.
*/
/** @todo move this up before the dispatching? */
{
}
/*
* Trap specific handling.
*/
{
/*
* If MONITOR & MWAIT are supported, then interpret them here.
*/
if ( RT_SUCCESS(rc)
{
{
rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCPU(pVM, pVCpu, &cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR, &opsize));
if (RT_SUCCESS(rc))
{
return rc;
}
}
}
}
{
/*
* Handle I/O bitmap?
*/
/** @todo We're not supposed to be here with a false guest trap concerning
* I/O access. We can easily handle those in RC. */
if ( RT_SUCCESS(rc)
{
/*
* We should really check the TSS for the IO bitmap, but it's not like this
* lazy approach really makes things worse.
*/
}
}
#ifdef LOG_ENABLED
/* Get guest page information. */
Log(("emR3RawGuestTrap: cs:eip=%04x:%08x: trap=%02x err=%08x cr2=%08x cr0=%08x%s: Phys=%RGp fFlags=%08llx %s %s %s%s rc2=%d\n",
pCtx->cs, pCtx->eip, u8TrapNo, uErrorCode, uCR2, (uint32_t)pCtx->cr0, (enmType == TRPM_SOFTWARE_INT) ? " software" : "", GCPhys, fFlags,
#endif
/*
* #PG has CR2.
* (Because of stuff like above we must set CR2 in a delayed fashion.)
*/
return VINF_EM_RESCHEDULE_REM;
}
/**
* Handle a ring switch trap.
* Need to do statistics and to install patches. The result is going to REM.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
*/
{
int rc;
/*
* sysenter, syscall & callgate
*/
if (RT_SUCCESS(rc))
{
{
{
(SELMGetCpuModeFromSelector(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) == CPUMODE_32BIT) ? PATMFL_CODE32 : 0);
if (RT_SUCCESS(rc))
{
return VINF_EM_RESCHEDULE_RAW;
}
}
}
#ifdef VBOX_WITH_STATISTICS
{
case OP_SYSENTER:
break;
case OP_SYSEXIT:
break;
case OP_SYSCALL:
break;
case OP_SYSRET:
break;
}
#endif
}
else
/* go to the REM to emulate a single instruction */
}
/**
* Handle a trap (\#PF or \#GP) in patch code
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
* @param pCtx CPU context
* @param gcret GC return code
*/
{
int rc;
if (gcret == VINF_PATM_PATCH_INT3)
{
u8TrapNo = 3;
uCR2 = 0;
uErrorCode = 0;
}
else if (gcret == VINF_PATM_PATCH_TRAP_GP)
{
/* No active trap in this case. Kind of ugly. */
uCR2 = 0;
uErrorCode = 0;
}
else
{
if (RT_FAILURE(rc))
{
return rc;
}
/* Reset the trap as we'll execute the original instruction again. */
}
/*
* Deal with traps inside patch code.
* (This code won't run outside GC.)
*/
if (u8TrapNo != 1)
{
#ifdef LOG_ENABLED
if ( RT_SUCCESS(rc)
{
/* Iret crashes are bad as we have already changed the flags on the stack */
if (rc == VINF_SUCCESS)
{
if ( (uEFlags & X86_EFL_VM)
{
if (uEFlags & X86_EFL_VM)
{
if (rc == VINF_SUCCESS)
{
Log(("Patch code: IRET->VM stack frame: return address %04X:%08RX32 eflags=%08x ss:esp=%04X:%08RX32\n", selCS, eip, uEFlags, selSS, esp));
Log(("Patch code: IRET->VM stack frame: DS=%04X ES=%04X FS=%04X GS=%04X\n", selDS, selES, selFS, selGS));
}
}
else
Log(("Patch code: IRET stack frame: return address %04X:%08RX32 eflags=%08x ss:esp=%04X:%08RX32\n", selCS, eip, uEFlags, selSS, esp));
}
else
Log(("Patch code: IRET stack frame: return address %04X:%08RX32 eflags=%08x\n", selCS, eip, uEFlags));
}
}
#endif /* LOG_ENABLED */
Log(("emR3PatchTrap: in patch: eip=%08x: trap=%02x err=%08x cr2=%08x cr0=%08x\n",
switch (rc)
{
/*
* Execute the faulting instruction.
*/
case VINF_SUCCESS:
{
/** @todo execute a whole block */
Log(("emR3PatchTrap: Virtual IF flag disabled!!\n"));
{
/* Windows XP lets irets fault intentionally and then takes action based on the opcode; an
* int3 patch overwrites it and leads to blue screens. Remove the patch in this case.
*/
if ( u8TrapNo == X86_XCPT_GP
{
/** @todo move to PATMR3HandleTrap */
}
/** @todo Knoppix 5 regression when returning VINF_SUCCESS here and going back to raw mode. */
/* Note: possibly because a reschedule is required (e.g. iret to V86 code) */
/* Interrupts are enabled; just go back to the original instruction.
return VINF_SUCCESS; */
}
return VINF_EM_RESCHEDULE_REM;
}
/*
* One instruction.
*/
case VINF_PATCH_EMULATE_INSTR:
Log(("emR3PatchTrap: Emulate patched instruction at %RGv IF=%d VMIF=%x\n",
/*
* The patch was disabled, hand it to the REM.
*/
case VERR_PATCH_DISABLED:
Log(("emR3PatchTrap: Virtual IF flag disabled!!\n"));
{
/*
*/
Log(("PATCH: IF=1 -> emulate last instruction as it can't be interrupted!!\n"));
}
return VINF_EM_RESCHEDULE_REM;
/* Force continued patch exection; usually due to write monitored stack. */
case VINF_PATCH_CONTINUE:
return VINF_SUCCESS;
/*
* Anything else is *fatal*.
*/
default:
return VERR_IPE_UNEXPECTED_STATUS;
}
}
return VINF_SUCCESS;
}
/**
* Handle a privileged instruction.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle;
*/
{
if (PATMIsEnabled(pVM))
{
/*
* Check if in patch code.
*/
{
#ifdef LOG_ENABLED
#endif
AssertMsgFailed(("FATAL ERROR: executing random instruction inside generated patch jump %08X\n", pCtx->eip));
return VERR_EM_RAW_PATCH_CONFLICT;
}
{
(SELMGetCpuModeFromSelector(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) == CPUMODE_32BIT) ? PATMFL_CODE32 : 0);
if (RT_SUCCESS(rc))
{
#ifdef LOG_ENABLED
#endif
return VINF_SUCCESS;
}
}
}
#ifdef LOG_ENABLED
{
}
#endif
/*
* Instruction statistics and logging.
*/
int rc;
if (RT_SUCCESS(rc))
{
#ifdef VBOX_WITH_STATISTICS
{
case OP_INVLPG:
break;
case OP_IRET:
break;
case OP_CLI:
break;
case OP_STI:
break;
case OP_INSB:
case OP_INSWD:
case OP_IN:
case OP_OUTSB:
case OP_OUTSWD:
case OP_OUT:
AssertMsgFailed(("Unexpected privileged exception due to port IO\n"));
break;
case OP_MOV_CR:
{
//read
}
else
{
//write
}
break;
case OP_MOV_DR:
break;
case OP_LLDT:
break;
case OP_LIDT:
break;
case OP_LGDT:
break;
case OP_SYSENTER:
break;
case OP_SYSEXIT:
break;
case OP_SYSCALL:
break;
case OP_SYSRET:
break;
case OP_HLT:
break;
default:
break;
}
#endif /* VBOX_WITH_STATISTICS */
{
{
case OP_CLI:
return VINF_EM_RESCHEDULE_REM; /* must go to the recompiler now! */
case OP_STI:
return VINF_SUCCESS;
case OP_HLT:
{
if (enmState == PATMTRANS_OVERWRITTEN)
{
/* Conflict detected, patch disabled */
}
/* The translation had better be successful. Otherwise we can't recover. */
AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %08RX32\n", pCtx->eip));
if (enmState != PATMTRANS_OVERWRITTEN)
}
/* no break; we could just return VINF_EM_HALT here */
case OP_MOV_CR:
case OP_MOV_DR:
#ifdef LOG_ENABLED
{
}
#endif
rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCPU(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR, &size));
if (RT_SUCCESS(rc))
{
)
{
/* Deal with CR0 updates inside patch code that force
* us to go to the recompiler.
*/
{
Log(("Force recompiler switch due to cr0 (%RGp) update rip=%RGv -> %RGv (enmState=%d)\n", pCtx->cr0, pCtx->rip, pOrgInstrGC, enmState));
if (enmState == PATMTRANS_OVERWRITTEN)
{
/* Conflict detected, patch disabled */
}
/* The translation had better be successful. Otherwise we can't recover. */
AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %RGv\n", (RTGCPTR)pCtx->rip));
if (enmState != PATMTRANS_OVERWRITTEN)
}
return VINF_EM_RESCHEDULE;
}
return rc; /* can return VINF_EM_HALT as well. */
}
break; /* fall back to the recompiler */
}
}
}
}
/**
* Update the forced rawmode execution modifier.
*
* This function is called when we're returning from the raw-mode loop(s). If we're
* in patch code, it will set a flag forcing execution to be resumed in raw-mode,
* if not in patch code, the flag will be cleared.
*
* We should never interrupt patch code while it's being executed. Cli patches can
* contain big code blocks, but they are always executed with IF=0. Other patches
* replace single instructions and should be atomic.
*
* @returns Updated rc.
*
* @param pVM The VM handle.
* @param pVCpu The VMCPU handle.
* @param pCtx The guest CPU context.
* @param rc The result code.
*/
{
{
/* ignore reschedule attempts. */
switch (rc)
{
case VINF_EM_RESCHEDULE:
case VINF_EM_RESCHEDULE_REM:
LogFlow(("emR3RawUpdateForceFlag: patch address -> force raw reschedule\n"));
rc = VINF_SUCCESS;
break;
}
}
else
return rc;
}
/**
* Check for pending raw actions
*
* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
* EM statuses.
* @param pVM The VM to operate on.
* @param pVCpu The VMCPU handle.
*/
{
return rc;
}
/**
* Process raw-mode specific forced actions.
*
* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
*
* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
* EM statuses.
* @param pVM The VM handle.
* @param pVCpu The VMCPU handle.
* @param pCtx The guest CPUM register context.
*/
{
/*
* Note that the order is *vitally* important!
* Also note that SELMR3UpdateFromCPUM may trigger VM_FF_SELM_SYNC_TSS.
*/
/*
* Sync selector tables.
*/
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Sync IDT.
*
* The CSAMR3CheckGates call in TRPMR3SyncIDT may call PGMPrefetchPage
* and PGMShwModifyPage, so we're in for trouble if for instance a
* PGMSyncCR3+pgmR3PoolClearAll is pending.
*/
{
&& CSAMIsEnabled(pVM))
{
int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
if (RT_FAILURE(rc))
return rc;
}
if (RT_FAILURE(rc))
return rc;
}
/*
* Sync TSS.
*/
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Sync page directory.
*/
{
int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
if (RT_FAILURE(rc))
return rc;
/* Prefetch pages for EIP and ESP. */
/** @todo This is rather expensive. Should investigate if it really helps at all. */
if (rc == VINF_SUCCESS)
if (rc != VINF_SUCCESS)
{
if (rc != VINF_PGM_SYNC_CR3)
{
return rc;
}
rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
if (RT_FAILURE(rc))
return rc;
}
/** @todo maybe prefetch the supervisor stack page as well */
}
/*
* Allocate handy pages (just in case the above actions have consumed some pages).
*/
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Check whether we're out of memory now.
*
* This may stem from some of the above actions or operations that has been executed
* since we ran FFs. The allocate handy pages must for instance always be followed by
* this check.
*/
return VINF_EM_NO_MEMORY;
return VINF_SUCCESS;
}
/**
* Executes raw code.
*
* This function contains the raw-mode version of the inner
* execution loop (the outer loop being in EMR3ExecuteVM()).
*
* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
* @param pfFFDone Where to store an indicator telling whether or not
* FFs were done before returning.
*/
{
int rc = VERR_IPE_UNINITIALIZED_STATUS;
*pfFFDone = false;
/*
*
* Spin till we get a forced action or raw mode status code resulting in
* in anything but VINF_SUCCESS or VINF_EM_RESCHEDULE_RAW.
*
*/
for (;;)
{
/*
* Check various preconditions.
*/
#ifdef VBOX_STRICT
# ifdef VBOX_WITH_REM
# endif
&& PGMMapHasConflicts(pVM))
{
AssertMsgFailed(("We should not get conflicts any longer!!!\n"));
}
#endif /* VBOX_STRICT */
/*
* Process high priority pre-execution raw-mode FFs.
*/
{
if (rc != VINF_SUCCESS)
break;
}
/*
* If we're going to execute ring-0 code, the guest state needs to
* and perhaps EIP) needs to be stored with PATM.
*/
if (rc != VINF_SUCCESS)
{
break;
}
/*
* Scan code before executing it. Don't bother with user mode or V86 code
*/
{
{
if (rc != VINF_SUCCESS)
{
break;
}
}
}
#ifdef LOG_ENABLED
/*
* Log important stuff before entering GC.
*/
Log(("RV86: %04X:%08X IF=%d VMFlags=%x\n", pCtx->cs, pCtx->eip, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags));
{
Log(("RR0: %08X ESP=%08X IF=%d VMFlags=%x PIF=%d CPL=%d (Scanned=%d)\n", pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags, pGCState->fPIF, (pCtx->ss & X86_SEL_RPL), fCSAMScanned));
}
Log(("RR3: %08X ESP=%08X IF=%d VMFlags=%x\n", pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags));
#endif /* LOG_ENABLED */
/*
* Execute the code.
*/
{
}
else
{
/* Give up this time slice; virtual time continues */
RTThreadSleep(5);
rc = VINF_SUCCESS;
}
LogFlow(("RR0-E: %08X ESP=%08X IF=%d VMFlags=%x PIF=%d CPL=%d\n", pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags, pGCState->fPIF, (pCtx->ss & X86_SEL_RPL)));
/*
* Restore the real CPU state and deal with high priority post
* execution FFs before doing anything else.
*/
#ifdef VBOX_STRICT
/*
* Assert TSS consistency & rc vs patch code.
*/
if ( !VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT) /* GDT implies TSS at the moment. */
&& EMIsRawRing0Enabled(pVM))
switch (rc)
{
case VINF_SUCCESS:
case VINF_EM_RAW_INTERRUPT:
case VINF_PATM_PATCH_TRAP_PF:
case VINF_PATM_PATCH_TRAP_GP:
case VINF_PATM_PATCH_INT3:
case VINF_EM_RAW_GUEST_TRAP:
case VINF_EM_RESCHEDULE_RAW:
break;
default:
LogIt(NULL, 0, LOG_GROUP_PATM, ("Patch code interrupted at %RRv for reason %Rrc\n", (RTRCPTR)CPUMGetGuestEIP(pVCpu), rc));
break;
}
/*
* Let's go paranoid!
*/
&& PGMMapHasConflicts(pVM))
{
}
#endif /* VBOX_STRICT */
/*
* Process the returned status code.
*/
{
break;
}
if (rc != VINF_SUCCESS)
{
if (rc != VINF_SUCCESS)
{
break;
}
}
/*
* Check and execute forced actions.
*/
#ifdef VBOX_HIGH_RES_TIMERS_HACK
#endif
{
if ( rc != VINF_SUCCESS
&& rc != VINF_EM_RESCHEDULE_RAW)
{
if (rc != VINF_SUCCESS)
{
*pfFFDone = true;
break;
}
}
}
}
/*
* Return to outer loop.
*/
#if defined(LOG_ENABLED) && defined(DEBUG)
#endif
return rc;
}