EMHwaccm.cpp revision 1f1218115ed7be1a29be1143ef6d8736532af2cc
cba6719bd64ec749967bbe931230452664109857vboxsync/* $Id$ */
8e2911e5309f5dff976cc7ac17d832d4ee2cdca3vboxsync/** @file
8e2911e5309f5dff976cc7ac17d832d4ee2cdca3vboxsync * EM - Execution Monitor / Manager - hardware virtualization
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync/*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Copyright (C) 2006-2012 Oracle Corporation
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * available from http://www.virtualbox.org. This file is free software;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * you can redistribute it and/or modify it under the terms of the GNU
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * General Public License (GPL) as published by the Free Software
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync/*******************************************************************************
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync* Header Files *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync*******************************************************************************/
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#define LOG_GROUP LOG_GROUP_EM
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/em.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/vmm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/csam.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/selm.h>
cba6719bd64ec749967bbe931230452664109857vboxsync#include <VBox/vmm/trpm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/iem.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/iom.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/dbgf.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/pgm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#ifdef VBOX_WITH_REM
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync# include <VBox/vmm/rem.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/tm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/mm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/ssm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/pdmapi.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/pdmcritsect.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/pdmqueue.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/hwaccm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include "EMInternal.h"
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync#include "internal/em.h"
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync#include <VBox/vmm/vm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/cpumdis.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/dis.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/disopcode.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <VBox/vmm/dbgf.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include "VMMTracing.h"
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include <iprt/asm.h>
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync/*******************************************************************************
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync* Defined Constants And Macros *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync*******************************************************************************/
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#define EM_NOTIFY_HWACCM
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync/*******************************************************************************
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync* Internal Functions *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync*******************************************************************************/
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsyncDECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsyncstatic int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsyncstatic int emR3HwaccmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#define EMHANDLERC_WITH_HWACCM
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#include "EMHandleRCTmpl.h"
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#if defined(DEBUG) && defined(SOME_UNUSED_FUNCTIONS)
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync/**
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Steps hardware accelerated mode.
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * @returns VBox status code.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * @param pVM The VM handle.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * @param pVCpu The VMCPU handle.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsyncstatic int emR3HwAccStep(PVM pVM, PVMCPU pVCpu)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync{
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync Assert(pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HWACC);
b2b8d2ecd8d9bafa7d53919432c46e86fb377fa7vboxsync
b2b8d2ecd8d9bafa7d53919432c46e86fb377fa7vboxsync int rc;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync PCPUMCTX pCtx = pVCpu->em.s.pCtx;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS));
b2b8d2ecd8d9bafa7d53919432c46e86fb377fa7vboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync /*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Check vital forced actions, but ignore pending interrupts and timers.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync || VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync {
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = emR3HwaccmForcedActions(pVM, pVCpu, pCtx);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync if (rc != VINF_SUCCESS)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync return rc;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync }
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync /*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Set flags for single stepping.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) | X86_EFL_TF | X86_EFL_RF);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync /*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Single step.
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync * We do not start time or anything, if anything we should just do a few nanoseconds.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync do
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync {
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = VMMR3HwAccRunGC(pVM, pVCpu);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync } while ( rc == VINF_SUCCESS
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync || rc == VINF_EM_RAW_INTERRUPT);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync /*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Make sure the trap flag is cleared.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * (Too bad if the guest is trying to single step too.)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync /*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Deal with the return codes.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
cba6719bd64ec749967bbe931230452664109857vboxsync rc = emR3HwaccmHandleRC(pVM, pVCpu, pCtx, rc);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync return rc;
cba6719bd64ec749967bbe931230452664109857vboxsync}
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsyncstatic int emR3SingleStepExecHwAcc(PVM pVM, PVMCPU pVCpu, uint32_t cIterations)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync{
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync int rc = VINF_SUCCESS;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync EMSTATE enmOldState = pVCpu->em.s.enmState;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_HWACC;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync Log(("Single step BEGIN:\n"));
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync for (uint32_t i = 0; i < cIterations; i++)
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync {
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync DBGFR3PrgStep(pVCpu);
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync DBGFR3DisasInstrCurrentLog(pVCpu, "RSS: ");
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = emR3HwAccStep(pVM, pVCpu);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync if ( rc != VINF_SUCCESS
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync || !HWACCMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync break;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync }
cba6719bd64ec749967bbe931230452664109857vboxsync Log(("Single step END: rc=%Rrc\n", rc));
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
cba6719bd64ec749967bbe931230452664109857vboxsync pVCpu->em.s.enmState = enmOldState;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync return rc == VINF_SUCCESS ? VINF_EM_RESCHEDULE_REM : rc;
cba6719bd64ec749967bbe931230452664109857vboxsync}
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync#endif /* DEBUG */
cba6719bd64ec749967bbe931230452664109857vboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync
8bed792bc65abd39393889351f22263ce6c289bfvboxsync/**
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * Executes one (or perhaps a few more) instruction(s).
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync *
cba6719bd64ec749967bbe931230452664109857vboxsync * @returns VBox status code suitable for EM.
cba6719bd64ec749967bbe931230452664109857vboxsync *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * @param pVM VM handle.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * @param pVCpu VMCPU handle
cba6719bd64ec749967bbe931230452664109857vboxsync * @param rcRC Return code from RC.
cba6719bd64ec749967bbe931230452664109857vboxsync * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * instruction and prefix the log output with this text.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#ifdef LOG_ENABLED
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsyncstatic int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#else
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsyncstatic int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync{
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#ifdef LOG_ENABLED
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync PCPUMCTX pCtx = pVCpu->em.s.pCtx;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync int rc;
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync NOREF(rcRC);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync /*
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync *
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * The simple solution is to use the recompiler.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * The better solution is to disassemble the current instruction and
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * try handle as many as possible without using REM.
cba6719bd64ec749967bbe931230452664109857vboxsync *
cba6719bd64ec749967bbe931230452664109857vboxsync */
8bed792bc65abd39393889351f22263ce6c289bfvboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync#ifdef LOG_ENABLED
cba6719bd64ec749967bbe931230452664109857vboxsync /*
cba6719bd64ec749967bbe931230452664109857vboxsync * Disassemble the instruction if requested.
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync if (pszPrefix)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync {
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync DBGFR3InfoLog(pVM, "cpumguest", pszPrefix);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync DBGFR3DisasInstrCurrentLog(pVCpu, pszPrefix);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync }
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif /* LOG_ENABLED */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#if 0
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync /* Try our own instruction emulator before falling back to the recompiler. */
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync DISCPUSTATE Cpu;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "GEN EMU");
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync if (RT_SUCCESS(rc))
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync {
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync uint32_t size;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
8bed792bc65abd39393889351f22263ce6c289bfvboxsync switch (Cpu.pCurInstr->opcode)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync {
cba6719bd64ec749967bbe931230452664109857vboxsync /* @todo we can do more now */
cba6719bd64ec749967bbe931230452664109857vboxsync case OP_MOV:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_AND:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_OR:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_XOR:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_POP:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_INC:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_DEC:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync case OP_XCHG:
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync STAM_PROFILE_START(&pVCpu->em.s.StatMiscEmu, a);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = EMInterpretInstructionCPU(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, &size);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync if (RT_SUCCESS(rc))
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync {
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync pCtx->rip += Cpu.opsize;
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync#ifdef EM_NOTIFY_HWACCM
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HWACC)
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync HWACCMR3NotifyEmulated(pVCpu);
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync return rc;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync }
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync if (rc != VERR_EM_INTERPRETER)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync AssertMsgFailedReturn(("rc=%Rrc\n", rc), rc);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync break;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync }
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync }
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync#endif /* 0 */
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, a);
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#ifdef VBOX_WITH_REM
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync EMRemLock(pVM);
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync /* Flush the recompiler TLB if the VCPU has changed. */
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync pVM->em.s.idLastRemCpu = pVCpu->idCpu;
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = REMR3EmulateInstruction(pVM, pVCpu);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync EMRemUnlock(pVM);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#else
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); NOREF(pVM);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, a);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync#ifdef EM_NOTIFY_HWACCM
cba6719bd64ec749967bbe931230452664109857vboxsync if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HWACC)
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync HWACCMR3NotifyEmulated(pVCpu);
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync#endif
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync return rc;
dc1ef3adbbc24e348697c7f7d4b4df5cf4f64c32vboxsync}
cba6719bd64ec749967bbe931230452664109857vboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync
cba6719bd64ec749967bbe931230452664109857vboxsync/**
cba6719bd64ec749967bbe931230452664109857vboxsync * Executes one (or perhaps a few more) instruction(s).
801238b286a80a5dd67ba56a1f26c0bc98a2a1eavboxsync * This is just a wrapper for discarding pszPrefix in non-logging builds.
cba6719bd64ec749967bbe931230452664109857vboxsync *
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
* instruction and prefix the log output with this text.
* @param rcGC GC return code
*/
DECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
{
#ifdef LOG_ENABLED
return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
#else
return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC);
#endif
}
/**
* Executes one (or perhaps a few more) IO instruction(s).
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
*/
static int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
{
PCPUMCTX pCtx = pVCpu->em.s.pCtx;
STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
/* Try to restart the io instruction that was refused in ring-0. */
VBOXSTRICTRC rcStrict = HWACCMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
if (IOM_SUCCESS(rcStrict))
{
STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
}
AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
/** @todo probably we should fall back to the recompiler; otherwise we'll go back and forth between HC & GC
* as io instructions tend to come in packages of more than one
*/
DISCPUSTATE Cpu;
int rc2 = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "IO EMU");
if (RT_SUCCESS(rc2))
{
rcStrict = VINF_EM_RAW_EMULATE_INSTR;
if (!(Cpu.prefix & (PREFIX_REP | PREFIX_REPNE)))
{
switch (Cpu.pCurInstr->opcode)
{
case OP_IN:
{
STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
rcStrict = IOMInterpretIN(pVM, CPUMCTX2CORE(pCtx), &Cpu);
break;
}
case OP_OUT:
{
STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
rcStrict = IOMInterpretOUT(pVM, CPUMCTX2CORE(pCtx), &Cpu);
break;
}
}
}
else if (Cpu.prefix & PREFIX_REP)
{
switch (Cpu.pCurInstr->opcode)
{
case OP_INSB:
case OP_INSWD:
{
STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
rcStrict = IOMInterpretINS(pVM, CPUMCTX2CORE(pCtx), &Cpu);
break;
}
case OP_OUTSB:
case OP_OUTSWD:
{
STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
rcStrict = IOMInterpretOUTS(pVM, CPUMCTX2CORE(pCtx), &Cpu);
break;
}
}
}
/*
* Handled the I/O return codes.
* (The unhandled cases end up with rcStrict == VINF_EM_RAW_EMULATE_INSTR.)
*/
if (IOM_SUCCESS(rcStrict))
{
pCtx->rip += Cpu.opsize;
STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
return VBOXSTRICTRC_TODO(rcStrict);
}
if (rcStrict == VINF_EM_RAW_GUEST_TRAP)
{
/* The active trap will be dispatched. */
Assert(TRPMHasTrap(pVCpu));
STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
return VINF_SUCCESS;
}
AssertMsg(rcStrict != VINF_TRPM_XCPT_DISPATCHED, ("Handle VINF_TRPM_XCPT_DISPATCHED\n"));
if (RT_FAILURE(rcStrict))
{
STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
return VBOXSTRICTRC_TODO(rcStrict);
}
AssertMsg(rcStrict == VINF_EM_RAW_EMULATE_INSTR || rcStrict == VINF_EM_RESCHEDULE_REM, ("rcStrict=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
}
STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
return emR3ExecuteInstruction(pVM, pVCpu, "IO: ");
}
/**
* Process raw-mode specific forced actions.
*
* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
*
* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
* EM statuses.
* @param pVM The VM handle.
* @param pVCpu The VMCPU handle.
* @param pCtx The guest CPUM register context.
*/
static int emR3HwaccmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
{
/*
* Sync page directory.
*/
if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
{
Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
if (RT_FAILURE(rc))
return rc;
Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
/* Prefetch pages for EIP and ESP. */
/** @todo This is rather expensive. Should investigate if it really helps at all. */
rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DIS_SELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
if (rc == VINF_SUCCESS)
rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DIS_SELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
if (rc != VINF_SUCCESS)
{
if (rc != VINF_PGM_SYNC_CR3)
{
AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
return rc;
}
rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
if (RT_FAILURE(rc))
return rc;
}
/** @todo maybe prefetch the supervisor stack page as well */
Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
}
/*
* Allocate handy pages (just in case the above actions have consumed some pages).
*/
if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
{
int rc = PGMR3PhysAllocateHandyPages(pVM);
if (RT_FAILURE(rc))
return rc;
}
/*
* Check whether we're out of memory now.
*
* This may stem from some of the above actions or operations that has been executed
* since we ran FFs. The allocate handy pages must for instance always be followed by
* this check.
*/
if (VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY))
return VINF_EM_NO_MEMORY;
return VINF_SUCCESS;
}
/**
* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
*
* This function contains the raw-mode version of the inner
* execution loop (the outer loop being in EMR3ExecuteVM()).
*
* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
* @param pVCpu VMCPU handle.
* @param pfFFDone Where to store an indicator telling whether or not
* FFs were done before returning.
*/
int emR3HwAccExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
{
int rc = VERR_IPE_UNINITIALIZED_STATUS;
PCPUMCTX pCtx = pVCpu->em.s.pCtx;
LogFlow(("emR3HwAccExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs, (RTGCPTR)pCtx->rip));
*pfFFDone = false;
STAM_COUNTER_INC(&pVCpu->em.s.StatHwAccExecuteEntry);
#ifdef EM_NOTIFY_HWACCM
HWACCMR3NotifyScheduled(pVCpu);
#endif
/*
* Spin till we get a forced action which returns anything but VINF_SUCCESS.
*/
for (;;)
{
STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHwAccEntry, a);
/* Check if a forced reschedule is pending. */
if (HWACCMR3IsRescheduleRequired(pVM, pCtx))
{
rc = VINF_EM_RESCHEDULE;
break;
}
/*
* Process high priority pre-execution raw-mode FFs.
*/
VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS)); /* not relevant in HWACCM mode; shouldn't be set really. */
if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
|| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
{
rc = emR3HwaccmForcedActions(pVM, pVCpu, pCtx);
if (rc != VINF_SUCCESS)
break;
}
#ifdef LOG_ENABLED
/*
* Log important stuff before entering GC.
*/
if (TRPMHasTrap(pVCpu))
Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs, (RTGCPTR)pCtx->rip));
uint32_t cpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx));
if (pVM->cCpus == 1)
{
if (pCtx->eflags.Bits.u1VM)
Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
else if (CPUMIsGuestIn64BitCodeEx(pCtx))
Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
else
Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
}
else
{
if (pCtx->eflags.Bits.u1VM)
Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
else if (CPUMIsGuestIn64BitCodeEx(pCtx))
Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
else
Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
}
#endif /* LOG_ENABLED */
/*
* Execute the code.
*/
STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHwAccEntry, a);
if (RT_LIKELY(EMR3IsExecutionAllowed(pVM, pVCpu)))
{
STAM_PROFILE_START(&pVCpu->em.s.StatHwAccExec, x);
rc = VMMR3HwAccRunGC(pVM, pVCpu);
STAM_PROFILE_STOP(&pVCpu->em.s.StatHwAccExec, x);
}
else
{
/* Give up this time slice; virtual time continues */
STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
RTThreadSleep(5);
STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
rc = VINF_SUCCESS;
}
/*
* Deal with high priority post execution FFs before doing anything else.
*/
VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
|| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
/*
* Process the returned status code.
*/
if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
break;
rc = emR3HwaccmHandleRC(pVM, pVCpu, pCtx, rc);
if (rc != VINF_SUCCESS)
break;
/*
* Check and execute forced actions.
*/
#ifdef VBOX_HIGH_RES_TIMERS_HACK
TMTimerPollVoid(pVM, pVCpu);
#endif
if ( VM_FF_ISPENDING(pVM, VM_FF_ALL_MASK)
|| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_ALL_MASK))
{
rc = emR3ForcedActions(pVM, pVCpu, rc);
VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
if ( rc != VINF_SUCCESS
&& rc != VINF_EM_RESCHEDULE_HWACC)
{
*pfFFDone = true;
break;
}
}
}
/*
* Return to outer loop.
*/
#if defined(LOG_ENABLED) && defined(DEBUG)
RTLogFlush(NULL);
#endif
return rc;
}