VMM/VMMR3/EMHM.cpp

	EMHM.cpp revision 5458ac4dd5810481272e76d7bc4a48cdcf67af95
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/* $Id$ */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/** @file
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * EM - Execution Monitor / Manager - hardware virtualization
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/*
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * Copyright (C) 2006-2013 Oracle Corporation
8cf870d281dc8c242f083d14dfef05f24aa5fceeJnRouvignac *
8cf870d281dc8c242f083d14dfef05f24aa5fceeJnRouvignac * This file is part of VirtualBox Open Source Edition (OSE), as
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * available from http://www.virtualbox.org. This file is free software;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * you can redistribute it and/or modify it under the terms of the GNU
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * General Public License (GPL) as published by the Free Software
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * Foundation, in version 2 as it comes in the "COPYING" file of the
8cf870d281dc8c242f083d14dfef05f24aa5fceeJnRouvignac * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
8cf870d281dc8c242f083d14dfef05f24aa5fceeJnRouvignac * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
8cf870d281dc8c242f083d14dfef05f24aa5fceeJnRouvignac */
8cf870d281dc8c242f083d14dfef05f24aa5fceeJnRouvignac
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/*******************************************************************************
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn*   Header Files                                                               *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn*******************************************************************************/
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#define LOG_GROUP LOG_GROUP_EM
3e8ebc69e18e02f0935b37e8f5837aab18557f50ludovicp#include <VBox/vmm/em.h>
65faf58a723c5e70638f0a3fb4239f7042301ddeludo#include <VBox/vmm/vmm.h>
d5af1880773b35da2da505be54be517b746e7410ludovicp#include <VBox/vmm/csam.h>
d5af1880773b35da2da505be54be517b746e7410ludovicp#include <VBox/vmm/selm.h>
d5af1880773b35da2da505be54be517b746e7410ludovicp#include <VBox/vmm/trpm.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/iem.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/iom.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/dbgf.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/pgm.h>
d5af1880773b35da2da505be54be517b746e7410ludovicp#ifdef VBOX_WITH_REM
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn# include <VBox/vmm/rem.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/tm.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/mm.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/ssm.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/pdmapi.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/pdmcritsect.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/pdmqueue.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/hm.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include "EMInternal.h"
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/vm.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/cpumdis.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/dis.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/disopcode.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <VBox/vmm/dbgf.h>
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include "VMMTracing.h"
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#include <iprt/asm.h>
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp/*******************************************************************************
d5af1880773b35da2da505be54be517b746e7410ludovicp*   Defined Constants And Macros                                               *
d5af1880773b35da2da505be54be517b746e7410ludovicp*******************************************************************************/
d5af1880773b35da2da505be54be517b746e7410ludovicp#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
d5af1880773b35da2da505be54be517b746e7410ludovicp#define EM_NOTIFY_HM
d5af1880773b35da2da505be54be517b746e7410ludovicp#endif
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/*******************************************************************************
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn*   Internal Functions                                                         *
d5af1880773b35da2da505be54be517b746e7410ludovicp*******************************************************************************/
d5af1880773b35da2da505be54be517b746e7410ludovicpDECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
a9bdd643112af44da28ffc614f51413c2ab09669ludostatic int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
a9bdd643112af44da28ffc614f51413c2ab09669ludostatic int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
a9bdd643112af44da28ffc614f51413c2ab09669ludo
a9bdd643112af44da28ffc614f51413c2ab09669ludo#define EMHANDLERC_WITH_HM
a9bdd643112af44da28ffc614f51413c2ab09669ludo#include "EMHandleRCTmpl.h"
a9bdd643112af44da28ffc614f51413c2ab09669ludo
d5af1880773b35da2da505be54be517b746e7410ludovicp
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#if defined(DEBUG) && defined(SOME_UNUSED_FUNCTIONS)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/**
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * Steps hardware accelerated mode.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @returns VBox status code.
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift * @param   pVM     Pointer to the VM.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @param   pVCpu   Pointer to the VMCPU.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbnstatic int emR3HmStep(PVM pVM, PVMCPU pVCpu)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn{
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    Assert(pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    int         rc;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    PCPUMCTX    pCtx   = pVCpu->em.s.pCtx;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn# ifdef VBOX_WITH_RAW_MODE
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS));
d5af1880773b35da2da505be54be517b746e7410ludovicp# endif
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp    /*
d5af1880773b35da2da505be54be517b746e7410ludovicp     * Check vital forced actions, but ignore pending interrupts and timers.
d5af1880773b35da2da505be54be517b746e7410ludovicp     */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    {
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        if (rc != VINF_SUCCESS)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            return rc;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    }
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /*
d5af1880773b35da2da505be54be517b746e7410ludovicp     * Set flags for single stepping.
d5af1880773b35da2da505be54be517b746e7410ludovicp     */
d5af1880773b35da2da505be54be517b746e7410ludovicp    CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) | X86_EFL_TF | X86_EFL_RF);
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp    /*
d5af1880773b35da2da505be54be517b746e7410ludovicp     * Single step.
d5af1880773b35da2da505be54be517b746e7410ludovicp     * We do not start time or anything, if anything we should just do a few nanoseconds.
d5af1880773b35da2da505be54be517b746e7410ludovicp     */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    do
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    {
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        rc = VMMR3HmRunGC(pVM, pVCpu);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    } while (   rc == VINF_SUCCESS
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn             || rc == VINF_EM_RAW_INTERRUPT);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /*
d5af1880773b35da2da505be54be517b746e7410ludovicp     * Make sure the trap flag is cleared.
d5af1880773b35da2da505be54be517b746e7410ludovicp     * (Too bad if the guest is trying to single step too.)
d5af1880773b35da2da505be54be517b746e7410ludovicp     */
d5af1880773b35da2da505be54be517b746e7410ludovicp    CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
d5af1880773b35da2da505be54be517b746e7410ludovicp
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /*
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     * Deal with the return codes.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
d5af1880773b35da2da505be54be517b746e7410ludovicp    rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    return rc;
d5af1880773b35da2da505be54be517b746e7410ludovicp}
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicpstatic int emR3SingleStepExecHm(PVM pVM, PVMCPU pVCpu, uint32_t cIterations)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn{
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    int     rc          = VINF_SUCCESS;
a9bdd643112af44da28ffc614f51413c2ab09669ludo    EMSTATE enmOldState = pVCpu->em.s.enmState;
a9bdd643112af44da28ffc614f51413c2ab09669ludo    pVCpu->em.s.enmState  = EMSTATE_DEBUG_GUEST_HM;
a9bdd643112af44da28ffc614f51413c2ab09669ludo
a9bdd643112af44da28ffc614f51413c2ab09669ludo    Log(("Single step BEGIN:\n"));
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    for (uint32_t i = 0; i < cIterations; i++)
a9bdd643112af44da28ffc614f51413c2ab09669ludo    {
a9bdd643112af44da28ffc614f51413c2ab09669ludo        DBGFR3PrgStep(pVCpu);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, "RSS");
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        rc = emR3HmStep(pVM, pVCpu);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        if (    rc != VINF_SUCCESS
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            ||  !HMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            break;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    }
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    Log(("Single step END: rc=%Rrc\n", rc));
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    pVCpu->em.s.enmState = enmOldState;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    return rc == VINF_SUCCESS ? VINF_EM_RESCHEDULE_REM : rc;
6df86604699d401d24863654538c078d3750963ashankar_mbn}
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif /* DEBUG */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn/**
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * Executes one (or perhaps a few more) instruction(s).
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @returns VBox status code suitable for EM.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @param   pVM         Pointer to the VM.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @param   pVCpu       Pointer to the VMCPU.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @param   rcRC        Return code from RC.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @param   pszPrefix   Disassembly prefix. If not NULL we'll disassemble the
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn *                      instruction and prefix the log output with this text.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn */
6df86604699d401d24863654538c078d3750963ashankar_mbn#ifdef LOG_ENABLED
2c8454e288252bcfa5e77ea3d35bfed05266b869hajmastatic int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
2c8454e288252bcfa5e77ea3d35bfed05266b869hajma#else
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbnstatic int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn{
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#ifdef LOG_ENABLED
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    PCPUMCTX pCtx = pVCpu->em.s.pCtx;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    int      rc;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    NOREF(rcRC);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /*
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     * The simple solution is to use the recompiler.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     * The better solution is to disassemble the current instruction and
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     * try handle as many as possible without using REM.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#ifdef LOG_ENABLED
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /*
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     * Disassemble the instruction if requested.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn     */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    if (pszPrefix)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    {
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        DBGFR3_INFO_LOG(pVM, "cpumguest", pszPrefix);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    }
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif /* LOG_ENABLED */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#if 0
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /* Try our own instruction emulator before falling back to the recompiler. */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    DISCPUSTATE Cpu;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "GEN EMU");
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    if (RT_SUCCESS(rc))
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    {
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        switch (Cpu.pCurInstr->uOpcode)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        {
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        /* @todo we can do more now */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_MOV:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_AND:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_OR:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_XOR:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_POP:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_INC:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_DEC:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        case OP_XCHG:
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            STAM_PROFILE_START(&pVCpu->em.s.StatMiscEmu, a);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            if (RT_SUCCESS(rc))
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            {
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#ifdef EM_NOTIFY_HM
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn                if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn                    HMR3NotifyEmulated(pVCpu);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn                STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn                return rc;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            }
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            if (rc != VERR_EM_INTERPRETER)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn                AssertMsgFailedReturn(("rc=%Rrc\n", rc), rc);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn            break;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        }
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    }
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#endif /* 0 */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, a);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#ifdef VBOX_WITH_REM
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    EMRemLock(pVM);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    /* Flush the recompiler TLB if the VCPU has changed. */
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn        CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    pVM->em.s.idLastRemCpu = pVCpu->idCpu;
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    rc = REMR3EmulateInstruction(pVM, pVCpu);
d5af1880773b35da2da505be54be517b746e7410ludovicp    EMRemUnlock(pVM);
d5af1880773b35da2da505be54be517b746e7410ludovicp#else
d5af1880773b35da2da505be54be517b746e7410ludovicp    rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); NOREF(pVM);
d5af1880773b35da2da505be54be517b746e7410ludovicp#endif
d5af1880773b35da2da505be54be517b746e7410ludovicp    STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, a);
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp#ifdef EM_NOTIFY_HM
d5af1880773b35da2da505be54be517b746e7410ludovicp    if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
d5af1880773b35da2da505be54be517b746e7410ludovicp        HMR3NotifyEmulated(pVCpu);
d5af1880773b35da2da505be54be517b746e7410ludovicp#endif
d5af1880773b35da2da505be54be517b746e7410ludovicp    return rc;
d5af1880773b35da2da505be54be517b746e7410ludovicp}
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp/**
d5af1880773b35da2da505be54be517b746e7410ludovicp * Executes one (or perhaps a few more) instruction(s).
d5af1880773b35da2da505be54be517b746e7410ludovicp * This is just a wrapper for discarding pszPrefix in non-logging builds.
d5af1880773b35da2da505be54be517b746e7410ludovicp *
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @returns VBox status code suitable for EM.
d5af1880773b35da2da505be54be517b746e7410ludovicp * @param   pVM         Pointer to the VM.
d5af1880773b35da2da505be54be517b746e7410ludovicp * @param   pVCpu       Pointer to the VMCPU.
d5af1880773b35da2da505be54be517b746e7410ludovicp * @param   pszPrefix   Disassembly prefix. If not NULL we'll disassemble the
d5af1880773b35da2da505be54be517b746e7410ludovicp *                      instruction and prefix the log output with this text.
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn * @param   rcGC        GC return code
d5af1880773b35da2da505be54be517b746e7410ludovicp */
d5af1880773b35da2da505be54be517b746e7410ludovicpDECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
d5af1880773b35da2da505be54be517b746e7410ludovicp{
3e8ebc69e18e02f0935b37e8f5837aab18557f50ludovicp#ifdef LOG_ENABLED
d5af1880773b35da2da505be54be517b746e7410ludovicp    return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn#else
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn    return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC);
d5af1880773b35da2da505be54be517b746e7410ludovicp#endif
d5af1880773b35da2da505be54be517b746e7410ludovicp}
d5af1880773b35da2da505be54be517b746e7410ludovicp
d5af1880773b35da2da505be54be517b746e7410ludovicp/**
d5af1880773b35da2da505be54be517b746e7410ludovicp * Executes one (or perhaps a few more) IO instruction(s).
9def8137e705ec92bc3a2881a8457795c860fdb1shankar_mbn *
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift * @returns VBox status code suitable for EM.
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift * @param   pVM         Pointer to the VM.
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift * @param   pVCpu       Pointer to the VMCPU.
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift */
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swiftstatic int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift{
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift    PCPUMCTX pCtx = pVCpu->em.s.pCtx;
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift    STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift    /* Try to restart the io instruction that was refused in ring-0. */
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift    VBOXSTRICTRC rcStrict = HMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
62ecec3a82a8b838ee76c1f6610902d8fd7015cbmatthew_swift    if (IOM_SUCCESS(rcStrict))
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    {
e89b8e1cf5e7165e6453cd4fe8e57359f6ee2d01hajma        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
d5af1880773b35da2da505be54be517b746e7410ludovicp        STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma        return VBOXSTRICTRC_TODO(rcStrict);     /* rip already updated. */
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    }
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma                    RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma#ifdef VBOX_WITH_FIRST_IEM_STEP
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    /* Hand it over to the interpreter. */
65faf58a723c5e70638f0a3fb4239f7042301ddeludo    rcStrict = IEMExecOne(pVCpu);
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    LogFlow(("emR3ExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma    return VBOXSTRICTRC_TODO(rcStrict);
074f2520bc04a7a93b4123bc58fb40055c9174d2hajma
d5af1880773b35da2da505be54be517b746e7410ludovicp#else
d5af1880773b35da2da505be54be517b746e7410ludovicp    /** @todo probably we should fall back to the recompiler; otherwise we'll go back and forth between HC & GC
d5af1880773b35da2da505be54be517b746e7410ludovicp     *   as io instructions tend to come in packages of more than one
d5af1880773b35da2da505be54be517b746e7410ludovicp     */
65faf58a723c5e70638f0a3fb4239f7042301ddeludo    DISCPUSTATE Cpu;
fc2dab2c4a694677a94470b728850adada8e4369matthew    int rc2 = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "IO EMU");
fc2dab2c4a694677a94470b728850adada8e4369matthew    if (RT_SUCCESS(rc2))
fc2dab2c4a694677a94470b728850adada8e4369matthew    {
        rcStrict = VINF_EM_RAW_EMULATE_INSTR;

        if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
        {
            switch (Cpu.pCurInstr->uOpcode)
            {
                case OP_IN:
                {
                    STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
                    rcStrict = IOMInterpretIN(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
                    break;
                }

                case OP_OUT:
                {
                    STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
                    rcStrict = IOMInterpretOUT(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
                    break;
                }
            }
        }
        else if (Cpu.fPrefix & DISPREFIX_REP)
        {
            switch (Cpu.pCurInstr->uOpcode)
            {
                case OP_INSB:
                case OP_INSWD:
                {
                    STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
                    rcStrict = IOMInterpretINS(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
                    break;
                }

                case OP_OUTSB:
                case OP_OUTSWD:
                {
                    STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
                    rcStrict = IOMInterpretOUTS(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
                    break;
                }
            }
        }

        /*
         * Handled the I/O return codes.
         * (The unhandled cases end up with rcStrict == VINF_EM_RAW_EMULATE_INSTR.)
         */
        if (IOM_SUCCESS(rcStrict))
        {
            pCtx->rip += Cpu.cbInstr;
            STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
            return VBOXSTRICTRC_TODO(rcStrict);
        }

        if (rcStrict == VINF_EM_RAW_GUEST_TRAP)
        {
            /* The active trap will be dispatched. */
            Assert(TRPMHasTrap(pVCpu));
            STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
            return VINF_SUCCESS;
        }
        AssertMsg(rcStrict != VINF_TRPM_XCPT_DISPATCHED, ("Handle VINF_TRPM_XCPT_DISPATCHED\n"));

        if (RT_FAILURE(rcStrict))
        {
            STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
            return VBOXSTRICTRC_TODO(rcStrict);
        }
        AssertMsg(rcStrict == VINF_EM_RAW_EMULATE_INSTR || rcStrict == VINF_EM_RESCHEDULE_REM, ("rcStrict=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
    }

    STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
    return emR3ExecuteInstruction(pVM, pVCpu, "IO: ");
#endif
}


/**
 * Process raw-mode specific forced actions.
 *
 * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
 *
 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
 *          EM statuses.
 * @param   pVM         Pointer to the VM.
 * @param   pVCpu       Pointer to the VMCPU.
 * @param   pCtx        Pointer to the guest CPU context.
 */
static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
{
    /*
     * Sync page directory.
     */
    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
    {
        Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
        int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
        if (RT_FAILURE(rc))
            return rc;

#ifdef VBOX_WITH_RAW_MODE
        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
#endif

        /* Prefetch pages for EIP and ESP. */
        /** @todo This is rather expensive. Should investigate if it really helps at all. */
        rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
        if (rc == VINF_SUCCESS)
            rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
        if (rc != VINF_SUCCESS)
        {
            if (rc != VINF_PGM_SYNC_CR3)
            {
                AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
                return rc;
            }
            rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
            if (RT_FAILURE(rc))
                return rc;
        }
        /** @todo maybe prefetch the supervisor stack page as well */
#ifdef VBOX_WITH_RAW_MODE
        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
#endif
    }

    /*
     * Allocate handy pages (just in case the above actions have consumed some pages).
     */
    if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
    {
        int rc = PGMR3PhysAllocateHandyPages(pVM);
        if (RT_FAILURE(rc))
            return rc;
    }

    /*
     * Check whether we're out of memory now.
     *
     * This may stem from some of the above actions or operations that has been executed
     * since we ran FFs. The allocate handy pages must for instance always be followed by
     * this check.
     */
    if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
        return VINF_EM_NO_MEMORY;

    return VINF_SUCCESS;
}


/**
 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
 *
 * This function contains the raw-mode version of the inner
 * execution loop (the outer loop being in EMR3ExecuteVM()).
 *
 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
 *          VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
 *
 * @param   pVM         Pointer to the VM.
 * @param   pVCpu       Pointer to the VMCPU.
 * @param   pfFFDone    Where to store an indicator telling whether or not
 *                      FFs were done before returning.
 */
int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
{
    int      rc = VERR_IPE_UNINITIALIZED_STATUS;
    PCPUMCTX pCtx = pVCpu->em.s.pCtx;

    LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
    *pfFFDone = false;

    STAM_COUNTER_INC(&pVCpu->em.s.StatHmExecuteEntry);

#ifdef EM_NOTIFY_HM
    HMR3NotifyScheduled(pVCpu);
#endif

    /*
     * Spin till we get a forced action which returns anything but VINF_SUCCESS.
     */
    for (;;)
    {
        STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHmEntry, a);

        /* Check if a forced reschedule is pending. */
        if (HMR3IsRescheduleRequired(pVM, pCtx))
        {
            rc = VINF_EM_RESCHEDULE;
            break;
        }

        /*
         * Process high priority pre-execution raw-mode FFs.
         */
#ifdef VBOX_WITH_RAW_MODE
        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
#endif
        if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
            ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
        {
            rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
            if (rc != VINF_SUCCESS)
                break;
        }

#ifdef LOG_ENABLED
        /*
         * Log important stuff before entering GC.
         */
        if (TRPMHasTrap(pVCpu))
            Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));

        uint32_t cpl = CPUMGetGuestCPL(pVCpu);

        if (pVM->cCpus == 1)
        {
            if (pCtx->eflags.Bits.u1VM)
                Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
            else if (CPUMIsGuestIn64BitCodeEx(pCtx))
                Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
            else
                Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel,          pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
        }
        else
        {
            if (pCtx->eflags.Bits.u1VM)
                Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
            else if (CPUMIsGuestIn64BitCodeEx(pCtx))
                Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
            else
                Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel,          pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
        }
#endif /* LOG_ENABLED */

        /*
         * Execute the code.
         */
        STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHmEntry, a);

        if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
        {
            STAM_PROFILE_START(&pVCpu->em.s.StatHmExec, x);
            rc = VMMR3HmRunGC(pVM, pVCpu);
            STAM_PROFILE_STOP(&pVCpu->em.s.StatHmExec, x);
        }
        else
        {
            /* Give up this time slice; virtual time continues */
            STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
            RTThreadSleep(5);
            STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
            rc = VINF_SUCCESS;
        }


        /*
         * Deal with high priority post execution FFs before doing anything else.
         */
        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
        if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
            ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
            rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);

        /*
         * Process the returned status code.
         */
        if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
            break;

        rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
        if (rc != VINF_SUCCESS)
            break;

        /*
         * Check and execute forced actions.
         */
#ifdef VBOX_HIGH_RES_TIMERS_HACK
        TMTimerPollVoid(pVM, pVCpu);
#endif
        if (    VM_FF_IS_PENDING(pVM, VM_FF_ALL_MASK)
            ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_MASK))
        {
            rc = emR3ForcedActions(pVM, pVCpu, rc);
            VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
            if (    rc != VINF_SUCCESS
                &&  rc != VINF_EM_RESCHEDULE_HM)
            {
                *pfFFDone = true;
                break;
            }
        }
    }

    /*
     * Return to outer loop.
     */
#if defined(LOG_ENABLED) && defined(DEBUG)
    RTLogFlush(NULL);
#endif
    return rc;
}