CPUMR3Db.cpp revision 90ce7af4052f25f4a94d18c0ef86181971396cd3
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * CPUM - CPU database part.
441579693f771e49eb05f2bd20c316232155675bvboxsync * Copyright (C) 2013 Oracle Corporation
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * available from http://www.virtualbox.org. This file is free software;
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * you can redistribute it and/or modify it under the terms of the GNU
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * General Public License (GPL) as published by the Free Software
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/*******************************************************************************
6ef855ecf2121f708685307839f1262e0db1a024vboxsync* Header Files *
6ef855ecf2121f708685307839f1262e0db1a024vboxsync*******************************************************************************/
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/*******************************************************************************
6ef855ecf2121f708685307839f1262e0db1a024vboxsync* Structures and Typedefs *
6ef855ecf2121f708685307839f1262e0db1a024vboxsync*******************************************************************************/
6ef855ecf2121f708685307839f1262e0db1a024vboxsynctypedef struct CPUMDBENTRY
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The CPU name. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync const char *pszName;
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The full CPU name. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The CPU vendor (CPUMCPUVENDOR). */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The CPU family. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The CPU model. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The CPU stepping. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The microarchitecture. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** Flags (TBD). */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The maximum physical address with of the CPU. This should correspond to
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * the value in CPUID leaf 0x80000008 when present. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** Pointer to an array of CPUID leaves. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The number of CPUID leaves in the array paCpuIdLeaves points to. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The method used to deal with unknown CPUID leaves. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The default unknown CPUID value. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** MSR mask. Several microarchitectures ignore higher bits of the */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** The number of ranges in the table pointed to b paMsrRanges. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /** MSR ranges for this CPU. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/*******************************************************************************
6ef855ecf2121f708685307839f1262e0db1a024vboxsync* Defined Constants And Macros *
6ef855ecf2121f708685307839f1262e0db1a024vboxsync*******************************************************************************/
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** @def NULL_ALONE
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * For eliminating an unnecessary data dependency in standalone builds (for
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * VBoxSVC). */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** @def ZERO_ALONE
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * For eliminating an unnecessary data size dependency in standalone builds (for
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * VBoxSVC). */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** @name Short macros for the MSR range entries.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * These are rather cryptic, but this is to reduce the attack on the right
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Alias one MSR onto another (a_uTarget). */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_MsrAlias, kCpumMsrWrFn_MsrAlias, 0, a_uTarget, 0, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Functions handles everything. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFN(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, 0, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Functions handles everything, with GP mask. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFG(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, 0, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, read-only. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_ReadOnly, 0, 0, 0, UINT64_MAX, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, ignore all writes. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_IgnoreWrite, 0, 0, UINT64_MAX, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, with value. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFV(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uValue) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, a_uValue, 0, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, with write ignore mask. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFW(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_fWrIgnMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, a_fWrIgnMask, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, extended version. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFX(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uValue, a_fWrIgnMask, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, a_uValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, with CPUMCPU storage variable. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFS(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_CpumCpuMember) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RT_OFFSETOF(CPUMCPU, a_CpumCpuMember), 0, 0, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Function handlers, with CPUMCPU storage variable, ignore mask and GP mask. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MFZ(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_CpumCpuMember, a_fWrIgnMask, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RT_OFFSETOF(CPUMCPU, a_CpumCpuMember), 0, a_fWrIgnMask, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Read-only fixed value. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_ReadOnly, 0, a_uValue, 0, UINT64_MAX, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Read-only fixed value, ignores all writes. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, UINT64_MAX, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Read fixed value, ignore writes outside GP mask. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MVG(a_uMsr, a_szName, a_uValue, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, 0, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Read fixed value, extended version with both GP and ignore masks. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MVX(a_uMsr, a_szName, a_uValue, a_fWrIgnMask, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** The short form, no CPUM backing. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define MSN(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Range: Functions handles everything. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define RFN(a_uFirst, a_uLast, a_szName, a_enmRdFnSuff, a_enmWrFnSuff) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, 0, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Range: Read fixed value, read-only. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define RVO(a_uFirst, a_uLast, a_szName, a_uValue) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_ReadOnly, 0, a_uValue, 0, UINT64_MAX, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Range: Read fixed value, ignore writes. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define RVI(a_uFirst, a_uLast, a_szName, a_uValue) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, UINT64_MAX, 0, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Range: The short form, no CPUM backing. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#define RSN(a_uFirst, a_uLast, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync/** Internal form used by the macros. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync# define RINT(a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync { a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, 0, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName, \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync { 0 }, { 0 }, { 0 }, { 0 } }
6ef855ecf2121f708685307839f1262e0db1a024vboxsync# define RINT(a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName) \
6ef855ecf2121f708685307839f1262e0db1a024vboxsync { a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, 0, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName }
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * The database entries.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * 1. The first entry is special. It is the fallback for unknown
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * processors. Thus, it better be pretty representative.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * 2. The first entry for a CPU vendor is likewise important as it is
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * the default entry for that vendor.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Generally we put the most recent CPUs first, since these tend to have the
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * most complicated and backwards compatible list of MSRs.
6ef855ecf2121f708685307839f1262e0db1a024vboxsyncstatic CPUMDBENTRY const * const g_apCpumDbEntries[] =
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Binary search used by cpumR3MsrRangesInsert and has some special properties
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * wrt to mismatches.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @returns Insert location.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param paMsrRanges The MSR ranges to search.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param cMsrRanges The number of MSR ranges.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param uMsr What to search for.
6ef855ecf2121f708685307839f1262e0db1a024vboxsyncstatic uint32_t cpumR3MsrRangesBinSearch(PCCPUMMSRRANGE paMsrRanges, uint32_t cMsrRanges, uint32_t uMsr)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Ensures that there is space for at least @a cNewRanges in the table,
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * reallocating the table if necessary.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @returns Pointer to the MSR ranges on success, NULL on failure. On failure
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @a *ppaMsrRanges is freed and set to NULL.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param ppaMsrRanges The variable pointing to the ranges (input/output).
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param cMsrRanges The current number of ranges.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param cNewRanges The number of ranges to be added.
6ef855ecf2121f708685307839f1262e0db1a024vboxsyncstatic PCPUMMSRRANGE cpumR3MsrRangesEnsureSpace(PCPUMMSRRANGE *ppaMsrRanges, uint32_t cMsrRanges, uint32_t cNewRanges)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint32_t cMsrRangesAllocated = RT_ALIGN_32(cMsrRanges, 16);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint32_t cNew = RT_ALIGN_32(cMsrRanges + cNewRanges, 16);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync void *pvNew = RTMemRealloc(*ppaMsrRanges, cNew * sizeof(**ppaMsrRanges));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Inserts a new MSR range in into an sorted MSR range array.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * If the new MSR range overlaps existing ranges, the existing ones will be
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * adjusted/removed to fit in the new one.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @returns VBox status code.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @retval VINF_SUCCESS
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @retval VERR_NO_MEMORY
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param ppaMsrRanges The variable pointing to the ranges (input/output).
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param pcMsrRanges The variable holding number of ranges.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param pNewRange The new range.
6ef855ecf2121f708685307839f1262e0db1a024vboxsyncint cpumR3MsrRangesInsert(PCPUMMSRRANGE *ppaMsrRanges, uint32_t *pcMsrRanges, PCCPUMMSRRANGE pNewRange)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync Assert(pNewRange->enmRdFn > kCpumMsrRdFn_Invalid && pNewRange->enmRdFn < kCpumMsrRdFn_End);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync Assert(pNewRange->enmWrFn > kCpumMsrWrFn_Invalid && pNewRange->enmWrFn < kCpumMsrWrFn_End);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Optimize the linear insertion case where we add new entries at the end.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync && paMsrRanges[cMsrRanges - 1].uLast < pNewRange->uFirst)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 1);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint32_t i = cpumR3MsrRangesBinSearch(paMsrRanges, cMsrRanges, pNewRange->uFirst);
adbb0da2a65fc315cb37869fd2c6c80c7d8d5b8bvboxsync Assert(i == cMsrRanges || pNewRange->uFirst <= paMsrRanges[i].uLast);
adbb0da2a65fc315cb37869fd2c6c80c7d8d5b8bvboxsync Assert(i == 0 || pNewRange->uFirst > paMsrRanges[i - 1].uLast);
adbb0da2a65fc315cb37869fd2c6c80c7d8d5b8bvboxsync * Adding an entirely new entry?
939e2ecb812c6402abcc63e7d615c5444acfd02evboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 1);
adbb0da2a65fc315cb37869fd2c6c80c7d8d5b8bvboxsync memmove(&paMsrRanges[i + 1], &paMsrRanges[i], (cMsrRanges - i) * sizeof(paMsrRanges[0]));
58015215080abff9c3a752cb331b6efe29fe8933vboxsync * Replace existing entry?
58015215080abff9c3a752cb331b6efe29fe8933vboxsync else if ( pNewRange->uFirst == paMsrRanges[i].uFirst
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Splitting an existing entry?
6ef855ecf2121f708685307839f1262e0db1a024vboxsync else if ( pNewRange->uFirst > paMsrRanges[i].uFirst
6ef855ecf2121f708685307839f1262e0db1a024vboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 2);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync memmove(&paMsrRanges[i + 2], &paMsrRanges[i], (cMsrRanges - i) * sizeof(paMsrRanges[0]));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Complicated scenarios that can affect more than one range.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * The current code does not optimize memmove calls when replacing
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * one or more existing ranges, because it's tedious to deal with and
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * not expected to be a frequent usage scenario.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Adjust start of first match? */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Adjust end of first match? */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Replace the whole first match (lazy bird). */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync memmove(&paMsrRanges[i], &paMsrRanges[i + 1], (cMsrRanges - i - 1) * sizeof(paMsrRanges[0]));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Do the new range affect more ranges? */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Adjust the start of it, then we're done. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Remove it entirely. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync memmove(&paMsrRanges[i], &paMsrRanges[i + 1], (cMsrRanges - i - 1) * sizeof(paMsrRanges[0]));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Now, perform a normal insertion. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 1);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync memmove(&paMsrRanges[i + 1], &paMsrRanges[i], (cMsrRanges - i) * sizeof(paMsrRanges[0]));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Worker for cpumR3MsrApplyFudge that applies one table.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @returns VBox status code.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param pVM Pointer to the cross context VM structure.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param paRanges Array of MSRs to fudge.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param cRanges Number of MSRs in the array.
6ef855ecf2121f708685307839f1262e0db1a024vboxsyncstatic int cpumR3MsrApplyFudgeTable(PVM pVM, PCCPUMMSRRANGE paRanges, size_t cRanges)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync LogRel(("CPUM: MSR fudge: %#010x %s\n", paRanges[i].uFirst, paRanges[i].szName));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync int rc = cpumR3MsrRangesInsert(&pVM->cpum.s.GuestInfo.paMsrRangesR3, &pVM->cpum.s.GuestInfo.cMsrRanges,
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Fudges the MSRs that guest are known to access in some odd cases.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * A typical example is a VM that has been moved between different hosts where
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * for instance the cpu vendor differs.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @returns VBox status code.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param pVM Pointer to the cross context VM structure.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFX(0x00000001, "IA32_P5_MC_TYPE", Ia32P5McType, Ia32P5McType, 0, 0, UINT64_MAX),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFN(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFX(0x000000fe, "IA32_MTRRCAP", Ia32MtrrCap, ReadOnly, 0x508, 0, 0),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFX(0x00000179, "IA32_MCG_CAP", Ia32McgCap, ReadOnly, 0x005, 0, 0),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFX(0x0000017a, "IA32_MCG_STATUS", Ia32McgStatus, Ia32McgStatus, 0, ~(uint64_t)UINT32_MAX, 0),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFN(0x000001a0, "IA32_MISC_ENABLE", Ia32MiscEnable, Ia32MiscEnable),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFN(0x000001d9, "IA32_DEBUGCTL", Ia32DebugCtl, Ia32DebugCtl),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFO(0x000001db, "P6_LAST_BRANCH_FROM_IP", P6LastBranchFromIp),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFO(0x000001dc, "P6_LAST_BRANCH_TO_IP", P6LastBranchToIp),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFO(0x000001dd, "P6_LAST_INT_FROM_IP", P6LastIntFromIp),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFO(0x000001de, "P6_LAST_INT_TO_IP", P6LastIntToIp),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFS(0x00000277, "IA32_PAT", Ia32Pat, Ia32Pat, Guest.msrPAT),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFZ(0x000002ff, "IA32_MTRR_DEF_TYPE", Ia32MtrrDefType, Ia32MtrrDefType, GuestMsrs.msr.MtrrDefType, 0, ~(uint64_t)0xc07),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFN(0x00000400, "IA32_MCi_CTL_STATUS_ADDR_MISC", Ia32McCtlStatusAddrMiscN, Ia32McCtlStatusAddrMiscN),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync int rc = cpumR3MsrApplyFudgeTable(pVM, &s_aFudgeMsrs[0], RT_ELEMENTS(s_aFudgeMsrs));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * XP might mistake opterons and other newer CPUs for P4s.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync MFX(0x0000002c, "P4_EBC_FREQUENCY_ID", IntelP4EbcFrequencyId, IntelP4EbcFrequencyId, 0xf12010f, UINT64_MAX, 0),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync rc = cpumR3MsrApplyFudgeTable(pVM, &s_aP4FudgeMsrs[0], RT_ELEMENTS(s_aP4FudgeMsrs));
6ef855ecf2121f708685307839f1262e0db1a024vboxsyncint cpumR3DbGetCpuInfo(const char *pszName, PCPUMINFO pInfo)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Create a CPU database entry for the host CPU. This means getting
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * the CPUID bits from the real CPU and grabbing the closest matching
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * database entry for MSRs.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync rc = CPUMR3CpuIdDetectUnknownLeafMethod(&pInfo->enmUnknownCpuIdMethod, &pInfo->DefCpuId);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync rc = CPUMR3CpuIdCollectLeaves(&pInfo->paCpuIdLeavesR3, &pInfo->cCpuIdLeaves);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Lookup database entry for MSRs. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync CPUMCPUVENDOR const enmVendor = CPUMR3CpuIdDetectVendorEx(pInfo->paCpuIdLeavesR3[0].uEax,
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint32_t const uStd1Eax = pInfo->paCpuIdLeavesR3[1].uEax;
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint8_t const uModel = ASMGetCpuModel(uStd1Eax, enmVendor == CPUMCPUVENDOR_INTEL);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint8_t const uStepping = ASMGetCpuStepping(uStd1Eax);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync CPUMMICROARCH const enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(enmVendor, uFamily, uModel, uStepping);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync for (unsigned i = 0; i < RT_ELEMENTS(g_apCpumDbEntries); i++)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Match against Family, Microarch, model and stepping. Except
6ef855ecf2121f708685307839f1262e0db1a024vboxsync for family, always match the closer with preference given to
6ef855ecf2121f708685307839f1262e0db1a024vboxsync the later/older ones. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* Perfect match. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync ? pCur->uStepping < pEntry->uStepping || pEntry->uStepping < uStepping
6ef855ecf2121f708685307839f1262e0db1a024vboxsync ? pCur->uModel < pEntry->uModel || pEntry->uModel < uModel
6ef855ecf2121f708685307839f1262e0db1a024vboxsync ? pCur->enmMicroarch < pEntry->enmMicroarch || pEntry->enmMicroarch < enmMicroarch
6ef855ecf2121f708685307839f1262e0db1a024vboxsync /* We don't do closeness matching on family, we use the first
6ef855ecf2121f708685307839f1262e0db1a024vboxsync entry for the CPU vendor instead. (P4 workaround.) */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync LogRel(("CPUM: Matched host CPU %s %#x/%#x/%#x %s with CPU DB entry '%s' (%s %#x/%#x/%#x %s).\n",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync CPUMR3CpuVendorName(enmVendor), uFamily, uModel, uStepping, CPUMR3MicroarchName(enmMicroarch),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pEntry->pszName, CPUMR3CpuVendorName((CPUMCPUVENDOR)pEntry->enmVendor), pEntry->uFamily, pEntry->uModel,
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pEntry->uStepping, CPUMR3MicroarchName(pEntry->enmMicroarch) ));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync LogRel(("CPUM: No matching processor database entry %s %#x/%#x/%#x %s, falling back on '%s'.\n",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync CPUMR3CpuVendorName(enmVendor), uFamily, uModel, uStepping, CPUMR3MicroarchName(enmMicroarch),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * We're supposed to be emulating a specific CPU that is included in
441579693f771e49eb05f2bd20c316232155675bvboxsync * our CPU database. The CPUID tables needs to be copied onto the
441579693f771e49eb05f2bd20c316232155675bvboxsync * heap so the caller can modify them and so they can be freed like
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * in the host case above.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync for (unsigned i = 0; i < RT_ELEMENTS(g_apCpumDbEntries); i++)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync if (!strcmp(pszName, g_apCpumDbEntries[i]->pszName))
6ef855ecf2121f708685307839f1262e0db1a024vboxsync LogRel(("CPUM: Cannot locate any CPU by the name '%s'\n", pszName));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pInfo->paCpuIdLeavesR3 = (PCPUMCPUIDLEAF)RTMemDup(pEntry->paCpuIdLeaves,
6ef855ecf2121f708685307839f1262e0db1a024vboxsync sizeof(pEntry->paCpuIdLeaves[0]) * pEntry->cCpuIdLeaves);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pInfo->enmUnknownCpuIdMethod = pEntry->enmUnknownCpuId;
6ef855ecf2121f708685307839f1262e0db1a024vboxsync LogRel(("CPUM: Using CPU DB entry '%s' (%s %#x/%#x/%#x %s).\n",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pEntry->pszName, CPUMR3CpuVendorName((CPUMCPUVENDOR)pEntry->enmVendor),
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pEntry->uFamily, pEntry->uModel, pEntry->uStepping, CPUMR3MicroarchName(pEntry->enmMicroarch) ));
6ef855ecf2121f708685307839f1262e0db1a024vboxsync pInfo->iFirstExtCpuIdLeaf = 0; /* Set by caller. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Copy the MSR range.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync while (cLeft-- > 0)
6ef855ecf2121f708685307839f1262e0db1a024vboxsync rc = cpumR3MsrRangesInsert(&paMsrs, &cMsrs, pCurMsr);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync Assert(!paMsrs); /* The above function frees this. */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Register statistics for the MSRs.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * This must not be called before the MSRs have been finalized and moved to the
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * hyper heap.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @returns VBox status code.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * @param pVM Pointer to the cross context VM structure.
383d5bd7b4b12176fbba2defc6c162e5b84e8ac0vboxsync * Global statistics.
383d5bd7b4b12176fbba2defc6c162e5b84e8ac0vboxsync STAM_REL_REG(pVM, &pCpum->cMsrReads, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/Reads",
383d5bd7b4b12176fbba2defc6c162e5b84e8ac0vboxsync STAMUNIT_OCCURENCES, "All RDMSRs making it to CPUM.");
383d5bd7b4b12176fbba2defc6c162e5b84e8ac0vboxsync STAM_REL_REG(pVM, &pCpum->cMsrReadsRaiseGp, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/ReadsRaisingGP",
383d5bd7b4b12176fbba2defc6c162e5b84e8ac0vboxsync STAMUNIT_OCCURENCES, "RDMSR raising #GPs, except unknown MSRs.");
939e2ecb812c6402abcc63e7d615c5444acfd02evboxsync STAM_REL_REG(pVM, &pCpum->cMsrReadsUnknown, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/ReadsUnknown",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMUNIT_OCCURENCES, "RDMSR on unknown MSRs (raises #GP).");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAM_REL_REG(pVM, &pCpum->cMsrWrites, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/Writes",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMUNIT_OCCURENCES, "All RDMSRs making it to CPUM.");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAM_REL_REG(pVM, &pCpum->cMsrWritesRaiseGp, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/WritesRaisingGP",
441579693f771e49eb05f2bd20c316232155675bvboxsync STAMUNIT_OCCURENCES, "WRMSR raising #GPs, except unknown MSRs.");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAM_REL_REG(pVM, &pCpum->cMsrWritesToIgnoredBits, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/WritesToIgnoredBits",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAM_REL_REG(pVM, &pCpum->cMsrWritesUnknown, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/WritesUnknown",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMUNIT_OCCURENCES, "WRMSR on unknown MSRs (raises #GP).");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync * Per range.
6ef855ecf2121f708685307839f1262e0db1a024vboxsync PCPUMMSRRANGE paRanges = pVM->cpum.s.GuestInfo.paMsrRangesR3;
6ef855ecf2121f708685307839f1262e0db1a024vboxsync uint32_t cRanges = pVM->cpum.s.GuestInfo.cMsrRanges;
6ef855ecf2121f708685307839f1262e0db1a024vboxsync cchName = RTStrPrintf(szName, sizeof(szName), "/CPUM/MSRs/%#010x-%s",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync cchName = RTStrPrintf(szName, sizeof(szName), "/CPUM/MSRs/%#010x-%#010x-%s",
6ef855ecf2121f708685307839f1262e0db1a024vboxsync paRanges[i].uFirst, paRanges[i].uLast, paRanges[i].szName);
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-reads");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMR3Register(pVM, &paRanges[i].cReads, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, szName, STAMUNIT_OCCURENCES, "RDMSR");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-writes");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMR3Register(pVM, &paRanges[i].cWrites, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "WRMSR");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-GPs");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMR3Register(pVM, &paRanges[i].cGps, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "#GPs");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-ign-bits-writes");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync STAMR3Register(pVM, &paRanges[i].cIgnoredBits, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "WRMSR w/ ignored bits");
6ef855ecf2121f708685307839f1262e0db1a024vboxsync# endif /* VBOX_WITH_STATISTICS */
6ef855ecf2121f708685307839f1262e0db1a024vboxsync#endif /* !CPUM_DB_STANDALONE */