CPUMR3Db.cpp revision 728b52f802ac19865bd4aa8e9ade8f506a9e6c10
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/* $Id$ */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @file
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * CPUM - CPU database part.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Copyright (C) 2013 Oracle Corporation
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * available from http://www.virtualbox.org. This file is free software;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * General Public License (GPL) as published by the Free Software
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync* Header Files *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync*******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define LOG_GROUP LOG_GROUP_CPUM
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include <VBox/vmm/cpum.h>
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include "CPUMInternal.h"
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include <VBox/vmm/vm.h>
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include <VBox/err.h>
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include <iprt/asm-amd64-x86.h>
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include <iprt/mem.h>
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include <iprt/string.h>
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync* Structures and Typedefs *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync*******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef struct CPUMDBENTRY
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The CPU name. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync const char *pszName;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The full CPU name. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync const char *pszFullName;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The CPU vendor (CPUMCPUVENDOR). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t enmVendor;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The CPU family. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t uFamily;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The CPU model. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t uModel;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The CPU stepping. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t uStepping;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The microarchitecture. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMMICROARCH enmMicroarch;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flags (TBD). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t fFlags;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The maximum physical address with of the CPU. This should correspond to
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * the value in CPUID leaf 0x80000008 when present. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t cMaxPhysAddrWidth;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to an array of CPUID leaves. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCCPUMCPUIDLEAF paCpuIdLeaves;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The number of CPUID leaves in the array paCpuIdLeaves points to. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cCpuIdLeaves;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The method used to deal with unknown CPUID leaves. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMUKNOWNCPUID enmUnknownCpuId;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The default unknown CPUID value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMCPUID DefUnknownCpuId;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** MSR mask. Several microarchitectures ignore higher bits of the */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t fMsrMask;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The number of ranges in the table pointed to b paMsrRanges. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** MSR ranges for this CPU. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCCPUMMSRRANGE paMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync} CPUMDBENTRY;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync* Defined Constants And Macros *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync*******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @def NULL_ALONE
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * For eliminating an unnecessary data dependency in standalone builds (for
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * VBoxSVC). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @def ZERO_ALONE
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * For eliminating an unnecessary data size dependency in standalone builds (for
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * VBoxSVC). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifndef CPUM_DB_STANDALONE
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# define NULL_ALONE(a_aTable) a_aTable
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# define ZERO_ALONE(a_cTable) a_cTable
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# define NULL_ALONE(a_aTable) NULL
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# define ZERO_ALONE(a_cTable) 0
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @name Short macros for the MSR range entries.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * These are rather cryptic, but this is to reduce the attack on the right
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * margin.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @{ */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Alias one MSR onto another (a_uTarget). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MAL(a_uMsr, a_szName, a_uTarget) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_MsrAlias, kCpumMsrWrFn_MsrAlias, 0, a_uTarget, 0, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Functions handles everything. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFN(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, 0, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Functions handles everything, with GP mask. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFG(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, 0, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, read-only. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFO(a_uMsr, a_szName, a_enmRdFnSuff) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_ReadOnly, 0, 0, 0, UINT64_MAX, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, ignore all writes. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFI(a_uMsr, a_szName, a_enmRdFnSuff) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_IgnoreWrite, 0, 0, UINT64_MAX, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, with value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFV(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uValue) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, a_uValue, 0, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, with write ignore mask. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFW(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_fWrIgnMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, a_fWrIgnMask, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, extended version. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFX(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uValue, a_fWrIgnMask, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, a_uValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, with CPUMCPU storage variable. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFS(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_CpumCpuMember) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RT_OFFSETOF(CPUMCPU, a_CpumCpuMember), 0, 0, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Function handlers, with CPUMCPU storage variable, ignore mask and GP mask. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MFZ(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_CpumCpuMember, a_fWrIgnMask, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RT_OFFSETOF(CPUMCPU, a_CpumCpuMember), 0, a_fWrIgnMask, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Read-only fixed value. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MVO(a_uMsr, a_szName, a_uValue) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_ReadOnly, 0, a_uValue, 0, UINT64_MAX, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Read-only fixed value, ignores all writes. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MVI(a_uMsr, a_szName, a_uValue) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, UINT64_MAX, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Read fixed value, ignore writes outside GP mask. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MVG(a_uMsr, a_szName, a_uValue, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, 0, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Read fixed value, extended version with both GP and ignore masks. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MVX(a_uMsr, a_szName, a_uValue, a_fWrIgnMask, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** The short form, no CPUM backing. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define MSN(a_uMsr, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uMsr, a_uMsr, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Range: Functions handles everything. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define RFN(a_uFirst, a_uLast, a_szName, a_enmRdFnSuff, a_enmWrFnSuff) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, 0, 0, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Range: Read fixed value, read-only. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define RVO(a_uFirst, a_uLast, a_szName, a_uValue) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_ReadOnly, 0, a_uValue, 0, UINT64_MAX, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Range: Read fixed value, ignore writes. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define RVI(a_uFirst, a_uLast, a_szName, a_uValue) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_FixedValue, kCpumMsrWrFn_IgnoreWrite, 0, a_uValue, UINT64_MAX, 0, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Range: The short form, no CPUM backing. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define RSN(a_uFirst, a_uLast, a_szName, a_enmRdFnSuff, a_enmWrFnSuff, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RINT(a_uFirst, a_uLast, kCpumMsrRdFn_##a_enmRdFnSuff, kCpumMsrWrFn_##a_enmWrFnSuff, 0, \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** Internal form used by the macros. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifdef VBOX_WITH_STATISTICS
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# define RINT(a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync { a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, 0, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName, \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync { 0 }, { 0 }, { 0 }, { 0 } }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# define RINT(a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName) \
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync { a_uFirst, a_uLast, a_enmRdFn, a_enmWrFn, a_offCpumCpu, 0, a_uInitOrReadValue, a_fWrIgnMask, a_fWrGpMask, a_szName }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** @} */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include "cpus/Intel_Core_i7_3960X.h"
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync#include "cpus/Intel_Core_i5_3570.h"
9f22c692723a5d3cb78b91896c48cf681c4fb608vboxsync#include "cpus/Intel_Xeon_X5482_3_20GHz.h"
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#include "cpus/Intel_Pentium_M_processor_2_00GHz.h"
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#include "cpus/Intel_Pentium_4_3_00GHz.h"
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include "cpus/AMD_FX_8150_Eight_Core.h"
4f9276b4c85a4617d08094484cc1d983791bbb16vboxsync#include "cpus/AMD_Phenom_II_X6_1100T.h"
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#include "cpus/Quad_Core_AMD_Opteron_2384.h"
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#include "cpus/AMD_Athlon_64_3200.h"
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * The database entries.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Warning! The first entry is special. It is the fallback for unknown
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * processors. Thus, it better be pretty representative.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncstatic CPUMDBENTRY const * const g_apCpumDbEntries[] =
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync#ifdef VBOX_CPUDB_Intel_Core_i5_3570
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync &g_Entry_Intel_Core_i5_3570,
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifdef VBOX_CPUDB_Intel_Core_i7_3960X
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync &g_Entry_Intel_Core_i7_3960X,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifdef Intel_Pentium_M_processor_2_00GHz
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync &g_Entry_Intel_Pentium_M_processor_2_00GHz,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
9f22c692723a5d3cb78b91896c48cf681c4fb608vboxsync#ifdef VBOX_CPUDB_Intel_Xeon_X5482_3_20GHz
9f22c692723a5d3cb78b91896c48cf681c4fb608vboxsync &g_Entry_Intel_Xeon_X5482_3_20GHz,
9f22c692723a5d3cb78b91896c48cf681c4fb608vboxsync#endif
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#ifdef VBOX_CPUDB_Intel_Pentium_4_3_00GHz
83d61602c6968041692aa7203ee51c4085c7e460vboxsync &g_Entry_Intel_Pentium_4_3_00GHz,
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#endif
83d61602c6968041692aa7203ee51c4085c7e460vboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifdef VBOX_CPUDB_AMD_FX_8150_Eight_Core
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync &g_Entry_AMD_FX_8150_Eight_Core,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifdef VBOX_CPUDB_AMD_Phenom_II_X6_1100T
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync &g_Entry_AMD_Phenom_II_X6_1100T,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifdef VBOX_CPUDB_Quad_Core_AMD_Opteron_2384
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync &g_Entry_Quad_Core_AMD_Opteron_2384,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#ifdef VBOX_CPUDB_AMD_Athlon_64_3200
83d61602c6968041692aa7203ee51c4085c7e460vboxsync &g_Entry_AMD_Athlon_64_3200,
83d61602c6968041692aa7203ee51c4085c7e460vboxsync#endif
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync};
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#ifndef CPUM_DB_STANDALONE
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Binary search used by cpumR3MsrRangesInsert and has some special properties
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * wrt to mismatches.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns Insert location.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param paMsrRanges The MSR ranges to search.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param cMsrRanges The number of MSR ranges.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param uMsr What to search for.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncstatic uint32_t cpumR3MsrRangesBinSearch(PCCPUMMSRRANGE paMsrRanges, uint32_t cMsrRanges, uint32_t uMsr)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return 0;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t iStart = 0;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t iLast = cMsrRanges - 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync for (;;)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t i = iStart + (iLast - iStart + 1) / 2;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if ( uMsr >= paMsrRanges[i].uFirst
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && uMsr <= paMsrRanges[i].uLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return i;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (uMsr < paMsrRanges[i].uFirst)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i <= iStart)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return i;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync iLast = i - 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i >= iLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i < cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync i++;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return i;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync iStart = i + 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync}
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Ensures that there is space for at least @a cNewRanges in the table,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * reallocating the table if necessary.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns Pointer to the MSR ranges on success, NULL on failure. On failure
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @a *ppaMsrRanges is freed and set to NULL.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param ppaMsrRanges The variable pointing to the ranges (input/output).
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param cMsrRanges The current number of ranges.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param cNewRanges The number of ranges to be added.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncstatic PCPUMMSRRANGE cpumR3MsrRangesEnsureSpace(PCPUMMSRRANGE *ppaMsrRanges, uint32_t cMsrRanges, uint32_t cNewRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cMsrRangesAllocated = RT_ALIGN_32(cMsrRanges, 16);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (cMsrRangesAllocated < cMsrRanges + cNewRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cNew = RT_ALIGN_32(cMsrRanges + cNewRanges, 16);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync void *pvNew = RTMemRealloc(*ppaMsrRanges, cNew * sizeof(**ppaMsrRanges));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!pvNew)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTMemFree(*ppaMsrRanges);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *ppaMsrRanges = NULL;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return NULL;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *ppaMsrRanges = (PCPUMMSRRANGE)pvNew;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return *ppaMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync}
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Inserts a new MSR range in into an sorted MSR range array.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * If the new MSR range overlaps existing ranges, the existing ones will be
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * adjusted/removed to fit in the new one.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns VBox status code.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @retval VINF_SUCCESS
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @retval VERR_NO_MEMORY
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param ppaMsrRanges The variable pointing to the ranges (input/output).
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pcMsrRanges The variable holding number of ranges.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pNewRange The new range.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint cpumR3MsrRangesInsert(PCPUMMSRRANGE *ppaMsrRanges, uint32_t *pcMsrRanges, PCCPUMMSRRANGE pNewRange)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cMsrRanges = *pcMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCPUMMSRRANGE paMsrRanges = *ppaMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(pNewRange->uLast >= pNewRange->uFirst);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(pNewRange->enmRdFn > kCpumMsrRdFn_Invalid && pNewRange->enmRdFn < kCpumMsrRdFn_End);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(pNewRange->enmWrFn > kCpumMsrWrFn_Invalid && pNewRange->enmWrFn < kCpumMsrWrFn_End);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Optimize the linear insertion case where we add new entries at the end.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if ( cMsrRanges > 0
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && paMsrRanges[cMsrRanges - 1].uLast < pNewRange->uFirst)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 1);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!paMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VERR_NO_MEMORY;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[cMsrRanges] = *pNewRange;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *pcMsrRanges += 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t i = cpumR3MsrRangesBinSearch(paMsrRanges, cMsrRanges, pNewRange->uFirst);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(i == cMsrRanges || pNewRange->uFirst <= paMsrRanges[i].uLast);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(i == 0 || pNewRange->uFirst > paMsrRanges[i - 1].uLast);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Adding an entirely new entry?
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if ( i >= cMsrRanges
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync || pNewRange->uLast < paMsrRanges[i].uFirst)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 1);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!paMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VERR_NO_MEMORY;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i < cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync memmove(&paMsrRanges[i + 1], &paMsrRanges[i], (cMsrRanges - i) * sizeof(paMsrRanges[0]));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i] = *pNewRange;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *pcMsrRanges += 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Replace existing entry?
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pNewRange->uFirst == paMsrRanges[i].uFirst
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pNewRange->uLast == paMsrRanges[i].uLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i] = *pNewRange;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Splitting an existing entry?
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pNewRange->uFirst > paMsrRanges[i].uFirst
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pNewRange->uLast < paMsrRanges[i].uLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 2);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!paMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VERR_NO_MEMORY;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i < cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync memmove(&paMsrRanges[i + 2], &paMsrRanges[i], (cMsrRanges - i) * sizeof(paMsrRanges[0]));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i + 1] = *pNewRange;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i + 2] = paMsrRanges[i];
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i ].uLast = pNewRange->uFirst - 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i + 2].uFirst = pNewRange->uLast + 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *pcMsrRanges += 2;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Complicated scenarios that can affect more than one range.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * The current code does not optimize memmove calls when replacing
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * one or more existing ranges, because it's tedious to deal with and
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * not expected to be a frequent usage scenario.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Adjust start of first match? */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if ( pNewRange->uFirst <= paMsrRanges[i].uFirst
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pNewRange->uLast < paMsrRanges[i].uLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i].uFirst = pNewRange->uLast + 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Adjust end of first match? */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pNewRange->uFirst > paMsrRanges[i].uFirst)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(paMsrRanges[i].uLast >= pNewRange->uFirst);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i].uLast = pNewRange->uFirst - 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync i++;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Replace the whole first match (lazy bird). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i + 1 < cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync memmove(&paMsrRanges[i], &paMsrRanges[i + 1], (cMsrRanges - i - 1) * sizeof(paMsrRanges[0]));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync cMsrRanges = *pcMsrRanges -= 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Do the new range affect more ranges? */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync while ( i < cMsrRanges
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pNewRange->uLast >= paMsrRanges[i].uFirst)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pNewRange->uLast < paMsrRanges[i].uLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Adjust the start of it, then we're done. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i].uFirst = pNewRange->uLast + 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync break;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Remove it entirely. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i + 1 < cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync memmove(&paMsrRanges[i], &paMsrRanges[i + 1], (cMsrRanges - i - 1) * sizeof(paMsrRanges[0]));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync cMsrRanges = *pcMsrRanges -= 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Now, perform a normal insertion. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges = cpumR3MsrRangesEnsureSpace(ppaMsrRanges, cMsrRanges, 1);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!paMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VERR_NO_MEMORY;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (i < cMsrRanges)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync memmove(&paMsrRanges[i + 1], &paMsrRanges[i], (cMsrRanges - i) * sizeof(paMsrRanges[0]));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paMsrRanges[i] = *pNewRange;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *pcMsrRanges += 1;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VINF_SUCCESS;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync}
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint cpumR3DbGetCpuInfo(const char *pszName, PCPUMINFO pInfo)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMDBENTRY const *pEntry = NULL;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync int rc;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!strcmp(pszName, "host"))
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Create a CPU database entry for the host CPU. This means getting
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * the CPUID bits from the real CPU and grabbing the closest matching
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * database entry for MSRs.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync rc = CPUMR3CpuIdDetectUnknownLeafMethod(&pInfo->enmUnknownCpuIdMethod, &pInfo->DefCpuId);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (RT_FAILURE(rc))
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return rc;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync rc = CPUMR3CpuIdCollectLeaves(&pInfo->paCpuIdLeavesR3, &pInfo->cCpuIdLeaves);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (RT_FAILURE(rc))
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return rc;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Lookup database entry for MSRs. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMCPUVENDOR const enmVendor = CPUMR3CpuIdDetectVendorEx(pInfo->paCpuIdLeavesR3[0].uEax,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR3[0].uEbx,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR3[0].uEcx,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR3[0].uEdx);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t const uStd1Eax = pInfo->paCpuIdLeavesR3[1].uEax;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t const uFamily = ASMGetCpuFamily(uStd1Eax);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t const uModel = ASMGetCpuModel(uStd1Eax, enmVendor == CPUMCPUVENDOR_INTEL);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t const uStepping = ASMGetCpuStepping(uStd1Eax);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMMICROARCH const enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(enmVendor, uFamily, uModel, uStepping);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync for (unsigned i = 0; i < RT_ELEMENTS(g_apCpumDbEntries); i++)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMDBENTRY const *pCur = g_apCpumDbEntries[i];
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if ((CPUMCPUVENDOR)pCur->enmVendor == enmVendor)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Anything from the same vendor is better than nothing: */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!pEntry)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Newer micro arch is better than an older one: */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pEntry->enmMicroarch < enmMicroarch
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pCur->enmMicroarch >= enmMicroarch)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Prefer a micro arch match: */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pEntry->enmMicroarch != enmMicroarch
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pCur->enmMicroarch == enmMicroarch)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* If the micro arch matches, check model and stepping. Stop
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync looping if we get an exact match. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pEntry->enmMicroarch == enmMicroarch
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync && pCur->enmMicroarch == enmMicroarch)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pCur->uModel == uModel)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Perfect match? */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pCur->uStepping == uStepping)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync break;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Better model match? */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pEntry->uModel != uModel)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* The one with the closest stepping, prefering ones over earlier ones. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pCur->uStepping > uStepping
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ? pCur->uStepping < pEntry->uStepping || pEntry->uStepping < uStepping
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync : pCur->uStepping > pEntry->uStepping)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* The one with the closest model, prefering later ones over earlier ones. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else if ( pCur->uModel > uModel
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ? pCur->uModel < pEntry->uModel || pEntry->uModel < uModel
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync : pCur->uModel > pEntry->uModel)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = pCur;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pEntry)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync LogRel(("CPUM: Matched host CPU %s %#x/%#x/%#x %s with CPU DB entry '%s' (%s %#x/%#x/%#x %s).\n",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMR3CpuVendorName(enmVendor), uFamily, uModel, uStepping, CPUMR3MicroarchName(enmMicroarch),
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry->pszName, CPUMR3CpuVendorName((CPUMCPUVENDOR)pEntry->enmVendor), pEntry->uFamily, pEntry->uModel,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry->uStepping, CPUMR3MicroarchName(pEntry->enmMicroarch) ));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = g_apCpumDbEntries[0];
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync LogRel(("CPUM: No matching processor database entry %s %#x/%#x/%#x %s, falling back on '%s'.\n",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync CPUMR3CpuVendorName(enmVendor), uFamily, uModel, uStepping, CPUMR3MicroarchName(enmMicroarch),
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry->pszName));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * We're supposed to be emulating a specific CPU that is included in
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * our CPU database. The CPUID tables needs to be copied onto the
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * heap so the caller can modify them and so they can be freed like
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * in the host case above.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync for (unsigned i = 0; i < RT_ELEMENTS(g_apCpumDbEntries); i++)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!strcmp(pszName, g_apCpumDbEntries[i]->pszName))
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry = g_apCpumDbEntries[i];
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync break;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!pEntry)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync LogRel(("CPUM: Cannot locate any CPU by the name '%s'\n", pszName));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VERR_CPUM_DB_CPU_NOT_FOUND;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->cCpuIdLeaves = pEntry->cCpuIdLeaves;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (pEntry->cCpuIdLeaves)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR3 = (PCPUMCPUIDLEAF)RTMemDup(pEntry->paCpuIdLeaves,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync sizeof(pEntry->paCpuIdLeaves[0]) * pEntry->cCpuIdLeaves);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (!pInfo->paCpuIdLeavesR3)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VERR_NO_MEMORY;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR3 = NULL;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->enmUnknownCpuIdMethod = pEntry->enmUnknownCpuId;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->DefCpuId = pEntry->DefUnknownCpuId;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync LogRel(("CPUM: Using CPU DB entry '%s' (%s %#x/%#x/%#x %s).\n",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry->pszName, CPUMR3CpuVendorName((CPUMCPUVENDOR)pEntry->enmVendor),
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pEntry->uFamily, pEntry->uModel, pEntry->uStepping, CPUMR3MicroarchName(pEntry->enmMicroarch) ));
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->fMsrMask = pEntry->fMsrMask;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->iFirstExtCpuIdLeaf = 0; /* Set by caller. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->uPadding = 0;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR0 = NIL_RTR0PTR;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paMsrRangesR0 = NIL_RTR0PTR;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesRC = NIL_RTRCPTR;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paMsrRangesRC = NIL_RTRCPTR;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Copy the MSR range.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cMsrs = 0;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCPUMMSRRANGE paMsrs = NULL;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCCPUMMSRRANGE pCurMsr = pEntry->paMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cLeft = pEntry->cMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync while (cLeft-- > 0)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync rc = cpumR3MsrRangesInsert(&paMsrs, &cMsrs, pCurMsr);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (RT_FAILURE(rc))
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync Assert(!paMsrs); /* The above function frees this. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTMemFree(pInfo->paCpuIdLeavesR3);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paCpuIdLeavesR3 = NULL;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return rc;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pCurMsr++;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->paMsrRangesR3 = paMsrs;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync pInfo->cMsrRanges = cMsrs;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VINF_SUCCESS;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync}
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/**
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Register statistics for the MSRs.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * This must not be called before the MSRs have been finalized and moved to the
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * hyper heap.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns VBox status code.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pVM Pointer to the cross context VM structure.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint cpumR3MsrRegStats(PVM pVM)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync{
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Global statistics.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCPUM pCpum = &pVM->cpum.s;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAM_REL_REG(pVM, &pCpum->cMsrReads, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/Reads",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "All RDMSRs making it to CPUM.");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAM_REL_REG(pVM, &pCpum->cMsrReadsRaiseGp, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/ReadsRaisingGP",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "RDMSR raising #GPs, except unknown MSRs.");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAM_REL_REG(pVM, &pCpum->cMsrReadsUnknown, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/ReadsUnknown",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "RDMSR on unknown MSRs (raises #GP).");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAM_REL_REG(pVM, &pCpum->cMsrWrites, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/Writes",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "All RDMSRs making it to CPUM.");
728b52f802ac19865bd4aa8e9ade8f506a9e6c10vboxsync STAM_REL_REG(pVM, &pCpum->cMsrWritesRaiseGp, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/WritesRaisingGP",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "WRMSR raising #GPs, except unknown MSRs.");
728b52f802ac19865bd4aa8e9ade8f506a9e6c10vboxsync STAM_REL_REG(pVM, &pCpum->cMsrWritesToIgnoredBits, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/WritesToIgnoredBits",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "Writing of ignored bits.");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAM_REL_REG(pVM, &pCpum->cMsrWritesUnknown, STAMTYPE_COUNTER, "/CPUM/MSR-Totals/WritesUnknown",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMUNIT_OCCURENCES, "WRMSR on unknown MSRs (raises #GP).");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# ifdef VBOX_WITH_STATISTICS
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /*
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Per range.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync PCPUMMSRRANGE paRanges = pVM->cpum.s.GuestInfo.paMsrRangesR3;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t cRanges = pVM->cpum.s.GuestInfo.cMsrRanges;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync for (uint32_t i = 0; i < cRanges; i++)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync char szName[160];
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ssize_t cchName;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync if (paRanges[i].uFirst == paRanges[i].uLast)
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync cchName = RTStrPrintf(szName, sizeof(szName), "/CPUM/MSRs/%#010x-%s",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paRanges[i].uFirst, paRanges[i].szName);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync else
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync cchName = RTStrPrintf(szName, sizeof(szName), "/CPUM/MSRs/%#010x-%#010x-%s",
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync paRanges[i].uFirst, paRanges[i].uLast, paRanges[i].szName);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-reads");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMR3Register(pVM, &paRanges[i].cReads, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, szName, STAMUNIT_OCCURENCES, "RDMSR");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-writes");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMR3Register(pVM, &paRanges[i].cWrites, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "WRMSR");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-GPs");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMR3Register(pVM, &paRanges[i].cGps, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "#GPs");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTStrCopy(&szName[cchName], sizeof(szName) - cchName, "-ign-bits-writes");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync STAMR3Register(pVM, &paRanges[i].cIgnoredBits, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "WRMSR w/ ignored bits");
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync }
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync# endif /* VBOX_WITH_STATISTICS */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync return VINF_SUCCESS;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync}
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif /* !CPUM_DB_STANDALONE */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync